Doug Carmean has been granted 12 US patents while listed as an inventor at Intel . The first was granted in 2006 and the most recent in June 2022. Doug Carmean ranks #396,045 of 4,157,543 US inventors in our database (top 9.5%). Patent records list Doug Carmean in Beaverton, OR, US.
Patents per Year Patents granted per year, 2006 to 2022 Bar chart with a peak of 3 patents in 2018. peak 3 2006: 1 patents 2006 2013: 1 patents 2013 2015: 1 patents 2015 2017: 1 patents 2017 2018: 3 patents 2018 2019: 3 patents 2019 2021: 1 patents 2021 2022: 1 patents 2022
Issued Patents All Time
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Showing 1–12 of 12 patents
Patent # Title Co-Inventors Date Approx Value ⓘ
11366511 Distribution of tasks among asymmetric processing elements Herbert Hum , Eric Sprangle , Rajesh Kumar 2022-06-21
$17,814,000
11054890 Distribution of tasks among asymmetric processing elements Herbert Hum , Eric Sprangle , Rajesh Kumar 2021-07-06
$31,309,000
10437320 Distribution of tasks among asymmetric processing elements Herbert Hum , Eric Sprangle , Rajesh Kumar 2019-10-08
$19,521,000
10409360 Distribution of tasks among asymmetric processing elements Herbert Hum , Eric Sprangle , Rajesh Kumar 2019-09-10
$24,704,000
10386915 Distribution of tasks among asymmetric processing elements Herbert Hum , Eric Sprangle , Rajesh Kumar 2019-08-20
$17,708,000
9939882 Systems and methods for migrating processes among asymmetrical processing cores Herbert Hum , Eric Sprangle , Rajesh Kumar 2018-04-10
$20,820,000
9910483 Distribution of tasks among asymmetric processing elements Herbert Hum , Eric Sprangle , Rajesh Kumar 2018-03-06
$18,859,000
9870046 Distribution of tasks among asymmetric processing elements Herbert Hum , Eric Sprangle , Rajesh Kumar 2018-01-16
$17,139,000
9760162 Distribution of tasks among asymmetric processing elements Herbert Hum , Eric Sprangle , Rajesh Kumar 2017-09-12
$10,213,000
8930722 Distribution of tasks among asymmetric processing elements Eric Sprangle , Rajesh Kumar 2015-01-06
$26,007,000
8615647 Migrating execution of thread between cores of different instruction set architecture in multi-core processor and transitioning each core to respective on / off power state Herbert Hum , Eric Sprangle , Rajesh Kumar 2013-12-24
$50,932,000
7080209 Method and apparatus for processing a load-lock instruction using a relaxed lock protocol Herbert Hum 2006-07-18
$11,508,000
