Issued Patents All Time
Showing 25 most recent of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12026799 | Method and apparatus for software based preemption using two-level binning to improve forward progress of preempted workloads | Gabriel T. Dagani, Christopher Paul Frascati, FNU GURUPAD, Rama Harihara, Keshavan Varadarajan | 2024-07-02 |
| 12020349 | Methods and apparatus for efficient blending in a graphics pipeline | Derek J. Lentz | 2024-06-25 |
| 11971949 | Flexible-access instructions for efficient access of ML data | Christopher Paul Frascati, Simon Joshua Waters, Rama S. B Harihara | 2024-04-30 |
| 11869117 | Systems and methods of adaptive, variable-rate, hybrid ray tracing | Keshavan Varadarajan | 2024-01-09 |
| 11798218 | Methods and apparatus for pixel packing | Keshavan Varadarajan, Veynu Narasiman | 2023-10-24 |
| 11763521 | Method and apparatus for the automation of variable rate shading in a GPU driver context | Gabriel T. Dagani, Gregory BERGSCHNEIDER | 2023-09-19 |
| 11748933 | Method for performing shader occupancy for small primitives | Keshavan Varadarajan, F N U Gurupad | 2023-09-05 |
| 11640649 | Methods and apparatus for efficient range calculation | Rahul Kumar, F N U Gurupad | 2023-05-02 |
| 11620222 | Methods and apparatus for atomic operations with multiple processing paths | Raun M. Krisch, Christopher Paul Frascati | 2023-04-04 |
| 11610281 | Methods and apparatus for implementing cache policies in a graphics processing unit | Sushant Kondguli, Arun Radhakrishnan, Zachary D. Neyland | 2023-03-21 |
| 11430080 | Methods and apparatus for speculative execution of fragments in a graphics pipeline | Veynu Narasiman, Keshavan Varadarajan | 2022-08-30 |
| 11416960 | Shader accessible configurable binning subsystem | Keshavan Varadarajan, Veynu Narasiman | 2022-08-16 |
| 11393068 | Methods and apparatus for efficient interpolation | Rahul Kumar, FNU GURUPAD | 2022-07-19 |
| 11360732 | Method and apparatus for displaying multiple devices on shared screen | Gabriel T. Dagani, Christopher Paul Frascati, Michael PHILLIP | 2022-06-14 |
| 11321907 | Method and apparatus for graphics driver optimization using daemon-based resources | Gabriel T. Dagani, Raun M. Krisch, Zachary D. Neyland, Robert Metzger | 2022-05-03 |
| 11276224 | Method for ray intersection sorting | Keshavan Varadarajan, Srinidhi Padmanabhan | 2022-03-15 |
| 11150721 | Providing hints to an execution unit to prepare for predicted subsequent arithmetic operations | Ming Y. Siu, Stuart F. Oberman, Colin Sprinkle, Srinivasan Iyer, Ian Kwong | 2021-10-19 |
| 11010954 | Efficient redundant coverage discard mechanism to reduce pixel shader work in a tile-based graphics rendering pipeline | Nilanjan Goswami, Derek J. Lentz, Adithya H. Krishnamurthy | 2021-05-18 |
| 10691455 | Power saving branch modes in hardware | Tejash M. Shah, Srinivasan S. Iyer | 2020-06-23 |
| 10635439 | Efficient interface and transport mechanism for binding bindless shader programs to run-time specified graphics pipeline configurations and objects | Mitchell Alsup, Derek J. Lentz, Srinivasan S. Iyer, Christopher James Goodman | 2020-04-28 |
| 10503513 | Dispatching a stored instruction in response to determining that a received instruction is of a same instruction type | Srinivasan Iyer, Stuart F. Oberman, Ming Y. Siu, Michael A. Fetterman, John Burgess +1 more | 2019-12-10 |
| 10496578 | Central arbitration scheme for a highly efficient interconnection topology in a GPU | Mitchell Alsup, Srinivasan S. Iyer | 2019-12-03 |
| 10386410 | Highly flexible performance counter and system debug module | Lawrence H. Rubin | 2019-08-20 |
| 10360034 | System and method for maintaining data in a low-power structure | Srinivasan S. Iyer, Mitchell Alsup | 2019-07-23 |
| 10310012 | Lightweight, low overhead debug bus | Lawrence H. Rubin | 2019-06-04 |