Issued Patents All Time
Showing 25 most recent of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12314212 | High level instructions with lower-level assembly code style primitives within a memory appliance for accessing memory | Vlad Fruchter | 2025-05-27 |
| 12099454 | Memory appliance couplings and operations | Vlad Fruchter, George Michael Uhler, Steven C. Woo, Chi-Ming Yeung, Ronald Lee | 2024-09-24 |
| 11860813 | High level instructions with lower-level assembly code style primitives within a memory appliance for accessing memory | Vlad Fruchter | 2024-01-02 |
| 11520633 | Thread associated memory allocation and memory architecture aware allocation | — | 2022-12-06 |
| 11210240 | Memory appliance couplings and operations | Vlad Fruchter, George Michael Uhler, Steven C. Woo, Chi-Ming Yeung, Ronald Lee | 2021-12-28 |
| 11132328 | High level instructions with lower-level assembly code style primitives within a memory appliance for accessing memory | Vlad Fruchter | 2021-09-28 |
| 10725824 | Thread associated memory allocation and memory architecture aware allocation | — | 2020-07-28 |
| 10574734 | Dynamic data and compute management | — | 2020-02-25 |
| 10437747 | Memory appliance couplings and operations | Vlad Fruchter, George Michael Uhler, Steven C. Woo, Chi-Ming Yeung, Ronald Lee | 2019-10-08 |
| 10255104 | System call queue between visible and invisible computing devices | Benjamin T. Sander, Michael Clair Houston, Newton Cheung | 2019-04-09 |
| 10146575 | Heterogeneous enqueuing and dequeuing mechanism for task scheduling | Benjamin T. Sander, Michael Clair Houston, Newton Cheung | 2018-12-04 |
| 10114903 | Method and apparatus for content synchronization | David K. Davidson, Avinash C. Saxena | 2018-10-30 |
| 9934194 | Memory packet, data structure and hierarchy within a memory appliance for accessing memory | Vlad Fruchter | 2018-04-03 |
| 9880971 | Memory appliance for accessing memory | Vlad Fruchter, Chi-Ming Yeung | 2018-01-30 |
| 9665533 | Blob pools, selectors, and command set implemented within a memory appliance for accessing memory | Vlad Fruchter | 2017-05-30 |
| 9658895 | System and method for configuring boot-time parameters of nodes of a cloud computing system | Mauricio Breternitz, Patryk Kaminski, Anton Chernoff | 2017-05-23 |
| 9645854 | Dynamic work partitioning on heterogeneous processing devices | Benjamin T. Sander, Michael Clair Houston, Newton Cheung | 2017-05-09 |
| 9602618 | Method and system for dynamic distributed data caching | Bryan S. Chin, David A. Consolver, Gregg A. DeMasters | 2017-03-21 |
| 9430281 | Heterogeneous enqueuing and dequeuing mechanism for task scheduling | Benjamin T. Sander, Michael Clair Houston, Newton Cheung | 2016-08-30 |
| 9369540 | Method and system for dynamic distributed data caching | Bryan S. Chin, David A. Consolver, Gregg A. DeMasters | 2016-06-14 |
| 9262231 | System and method for modifying a hardware configuration of a cloud computing system | Mauricio Breternitz, Patryk Kaminski, Anton Chernoff | 2016-02-16 |
| 9210236 | Method and system for dynamic distributed data caching | Bryan S. Chin, David A. Consolver, Gregg A. DeMasters | 2015-12-08 |
| 9152532 | System and method for configuring a cloud computing system with a synthetic test workload | Mauricio Breternitz, Patryk Kaminski, Anton Chernoff | 2015-10-06 |
| 9124594 | Method and apparatus for dynamic data flow control using prioritization of data requests | David K. Davidson, Avinash C. Saxena | 2015-09-01 |
| 9058183 | Hypervisor isolation of processor cores to enable computing accelerator cores | Thomas R. Woller, Patryk Kaminski, Erich Boleyn, Benjamin C. Serebrin | 2015-06-16 |