KR

Krishnan V. Ramani

AM AMD: 16 patents #689 of 9,279Top 8%
Overall (All Time): #291,204 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11645073 Address-based filtering for load/store speculation John Kalamatianos, Susumu Mashimo 2023-05-09
11194583 Speculative execution using a page-level tracked load order queue 2021-12-07
11113065 Speculative instruction wakeup to tolerate draining delay of memory ordering violation check buffers John Kalamatianos, Susumu Mashimo, Scott Thomas Bingham 2021-09-07
11099846 Apparatus and method for resynchronization prediction with variable upgrade and downgrade capability Chetana N. Keltcher 2021-08-24
11048506 Tracking stores and loads by bypassing load store units Kai Troester, Frank C. Galloway, David N. Suggs, Michael Achenbach, Betty A. McDaniel +1 more 2021-06-29
10990393 Address-based filtering for load/store speculation John Kalamatianos, Susumu Mashimo 2021-04-27
10949201 Processor with accelerated lock instruction operation Scott Thomas Bingham, Marius Evers, Thomas Kunjan 2021-03-16
10331357 Tracking stores and loads by bypassing load store units Betty A. McDaniel, Michael Achenbach, David N. Suggs, Frank C. Galloway, Kai Troester 2019-06-25
10241797 Replay reduction by wakeup suppression using early miss indication Ganesh Venkataramanan, Mike Butler 2019-03-26
8819397 Processor with increased efficiency via control word prediction Michael Estlick, Jay Fleischman, Debjit Das Sarma, Emil Talpes, Chun-En Liu 2014-08-26
8683179 Method and apparatus for performing store-to-load forwarding from an interlocking store using an enhanced load/store unit in a processor Chitresh Narasimhaiah, David Hugh McIntyre 2014-03-25
8392757 Method and apparatus for processing load instructions in a microprocessor having an enhanced instruction decoder and an enhanced load store unit Mike Butler, Kai Troester 2013-03-05
7822951 System and method of load-store forwarding Gary R. Lauterbach 2010-10-26
7263600 System and method for validating a memory file that links speculative results of load operations to register values Benjamin T. Sander, Ramsey W. Haddad, Mitchell Alsup 2007-08-28
6397239 Floating point addition pipeline including extreme value, comparison and accumulate functions Stuart F. Oberman, Norbert Juffa, Fred Weber, Ravi K. Cherukuri 2002-05-28
6298367 Floating point addition pipeline including extreme value, comparison and accumulate functions Stuart F. Oberman, Norbert Juffa, Fred Weber, Ravi Krishna 2001-10-02