Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JK

John Kalamatianos — 90 Patents

AMD: 90 patents #38 of 9,280Top 1%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
UTUtstarcom: 1 patents #58 of 185Top 35%
Boxborough, MA: #1 of 320 inventorsTop 1%
Massachusetts: #327 of 88,656 inventorsTop 1%
Overall (All Time): #17,911 of 4,157,543Top 1%
90 Patents All Time
John Kalamatianos has been granted 90 US patents while listed as an inventor at AMD. The first was granted in 2006 and the most recent in December 2025. John Kalamatianos ranks #17,911 of 4,157,543 US inventors in our database (top 0.43%). Patent records list John Kalamatianos in Boxborough, MA, US.

Patents per Year

Patents granted per year, 2006 to 2025Bar chart with a peak of 16 patents in 2023.peak 162006: 1 patents20062012: 2 patents2013: 3 patents20132014: 3 patents2015: 6 patents20152016: 3 patents2018: 1 patents20182019: 2 patents2020: 7 patents20202021: 9 patents2022: 11 patents20222023: 16 patents2024: 15 patents20242025: 11 patents2025

Issued Patents All Time

Showing 1–25 of 90 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12511236 Storing indications of cleared cache lines Jagadish B. Kotra, David A. Kaplan 2025-12-30
12498931 Preserving memory ordering between offloaded instructions and non-offloaded instructions Jagadish B. Kotra 2025-12-16
12493559 Modifying system directory capacity based on power state transition Srilatha Manne 2025-12-09
12461872 Semiconductor device for performing data reduction for processing arrays William Peter Ehrett, Anthony Gutierrez, Vedula Venkata Srikant Bharadwaj, Karthik Ramu Sangaiah, Prachi Shukla +2 more 2025-11-04
12430136 Systems and methods for branch misprediction aware cache prefetcher training Jagadish B. Kotra, Gabriel H. Loh 2025-09-30
12373207 Implementing a micro-operation cache with compaction Jagadish B. Kotra 2025-07-29
12360907 Region pattern-matching hardware prefetcher Gabriel H. Loh, Marko Scrbak, Akhil Arunkumar 2025-07-15
12339783 Managing a cache using per memory region reuse distance estimation Jagadish B. Kotra, Asmita Pal 2025-06-24
12306754 Method and apparatus for increasing memory level parallelism by reducing miss status holding register allocation in caches Jagadish B. Kotra, Paul James Moyer, Nicholas Dean Lance, Sriram Srinivasan, Patrick J. Shyvers +1 more 2025-05-20
12287739 Accessing a cache based on an address translation buffer result Jagadish B. Kotra 2025-04-29
12189953 Speculative dram request enabling and disabling Jagadish B. Kotra 2025-01-07
12175073 Reusing remote registers in processing in memory Varun Agrawal, Niti Madan 2024-12-24 $224,709,000
12153926 Processor-guided execution of offloaded instructions using fixed function operations Michael T. Clark, Marius Evers, William L. Walker, Paul James Moyer, Jay Fleischman +1 more 2024-11-26 $172,029,000
12153524 Apparatus, system, and method for throttling prefetchers to prevent training on irregular memory accesses Marko Scrbak, Gabriel H. Loh, Akhil Arunkumar 2024-11-26 $172,029,000
12135653 Flexible dictionary sharing for compressed caches Alexander D. Breslow 2024-11-05 $475,519,000
12111767 Method and apparatus for a page-local delta-based prefetcher Susumu Mashimo 2024-10-08 $436,551,000
12105957 Accelerating relaxed remote atomics on multiple writer operations Karthik Ramu Sangaiah, Anthony Gutierrez 2024-10-01 $299,271,000
12073251 Offloading computations from a processor to remote execution logic Nagadastagiri Reddy Challapalle, Jagadish B. Kotra 2024-08-27 $259,969,000
12066950 Approach for managing near-memory processing commands and non-near-memory processing commands in a memory controller Niti Madan 2024-08-20 $154,333,000
12045169 Hardware configuration selection using machine learning model Furkan Eris, Paul Keltcher, Mayank Chhablani, Alok Garg 2024-07-23 $558,571,000
12026401 DRAM row management for processing in memory Niti Madan, Yasuko Eckert, Varun Agrawal 2024-07-02 $421,347,000
12019547 Dispatch bandwidth of memory-centric requests by bypassing storage array address checking Jagadish B. Kotra, Gagandeep Panwar 2024-06-25
11960404 Method and apparatus for reducing the latency of long latency memory requests Jagadish B. Kotra 2024-04-16 $289,510,000
11921634 Leveraging processing-in-memory (PIM) resources to expedite non-PIM instructions executed on a host Jagadish B. Kotra, Yasuko Eckert, Yonghae Kim 2024-03-05 $588,545,000
11874739 Error detection and correction in memory modules using programmable ECC engines Sudhanva Gurumurthi, Vilas Sridharan, Shaizeen Aga, Nuwan Jayasena, Michael Ignatowski +1 more 2024-01-16 $391,702,000