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Error detection and correction in memory modules using programmable ECC engines |
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| 11797410 |
Chiplet-level performance information for configuring chiplets in a processor |
Yasuko Eckert, Anthony Gutierrez, Karthik Ramu Sangaiah, Vedula Venkata Srikant Bharadwaj |
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| 11656945 |
Method and apparatus to support instruction replay for executing idempotent code in dependent processing in memory devices |
John Kalamatianos, Nuwan Jayasena, Sudhanva Gurumurthi, Shaizeen Aga |
2023-05-23 |
| 11509333 |
Masked fault detection for reliable low voltage cache operation |
John Kalamatianos |
2022-11-22 |
| 11409608 |
Providing host-based error detection capabilities in a remote execution device |
Ross V. La Fetra, John Kalamatianos, Sudhanva Gurumurthi, Shaizeen Aga, Vilas Sridharan +2 more |
2022-08-09 |
| 11397691 |
Latency hiding for caches |
John Kalamatianos, Apostolos Kokolis |
2022-07-26 |
| 10908991 |
Bit error protection in cache memories |
John Kalamatianos |
2021-02-02 |
| 10884940 |
Method and apparatus for using compression to improve performance of low voltage caches |
John Kalamatianos, Shomit N. Das, Matthew Tomei |
2021-01-05 |
| 10558606 |
Reliable voltage scaled links for compressed data |
Shomit N. Das, Matthew Tomei, John Kalamatianos |
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| 10379944 |
Bit error protection in cache memories |
John Kalamatianos, Steven Raasch |
2019-08-13 |