Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182412 | Setting durations for which data is stored in a non-volatile memory based on data types | Andrew G. Kegel | 2024-12-31 |
| 12080362 | Method and apparatus for providing wear leveling | Greg Sadowski, David A. Roberts | 2024-09-03 |
| 12066965 | Encoding of symbols for a computer interconnect based on frequency of symbol values | SeyedMohammad SeyedzadehDelcheh, Sergey Blagodurov | 2024-08-20 |
| 12068215 | Method and apparatus for providing thermal wear leveling | David A. Roberts, Greg Sadowski | 2024-08-20 |
| 11816037 | Enhanced page information co-processor | Andrew G. Kegel | 2023-11-14 |
| 11742038 | Method and apparatus for providing wear leveling | Greg Sadowski, David A. Roberts | 2023-08-29 |
| 11726915 | Distributed coherence directory subsystem with exclusive data regions | Yasuko Eckert, Maurice B. Steinman | 2023-08-15 |
| 11586539 | Adaptive cache management based on programming model information | Weon Taek Na, Jagadish B. Kotra, Yasuko Eckert, Sergey Blagodurov | 2023-02-21 |
| 11551990 | Method and apparatus for providing thermal wear leveling | David A. Roberts, Greg Sadowski | 2023-01-10 |
| 11416323 | Defense mechanism for non-volatile memory based main memory | SeyedMohammad SeyedzadehDelcheh | 2022-08-16 |
| 11403221 | Memory access response merging in a memory hierarchy | Onur Kayiran, Yasuko Eckert, Mark H. Oskin, Gabriel H. Loh, Maxim V. Kazakov | 2022-08-02 |
| 11398831 | Temporal link encoding | Onur Kayiran, Sergey Blagodurov, Jagadish B. Kotra | 2022-07-26 |
| 11061583 | Setting durations for which data is stored in a non-volatile memory based on data types | Andrew G. Kegel | 2021-07-13 |
| 10950292 | Method and apparatus for mitigating row hammer attacks | SeyedMohammad SeyedzadehDelcheh | 2021-03-16 |
| 10838864 | Prioritizing local and remote memory access in a non-uniform memory access architecture | Michael W. Boyer, Onur Kayiran, Yasuko Eckert, Muhammad Shoaib Bin Altaf | 2020-11-17 |
| 10719441 | Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests | Jieming Yin, Yasuko Eckert, Matthew R. Poremba, Doug Hunt | 2020-07-21 |
| 10635588 | Distributed coherence directory subsystem with exclusive data regions | Yasuko Eckert, Maurice B. Steinman | 2020-04-28 |
| 10379944 | Bit error protection in cache memories | John Kalamatianos, Shrikanth Ganapathy | 2019-08-13 |
| 10365996 | Performance-aware and reliability-aware data placement for n-level heterogeneous memory systems | Manish Gupta, David A. Roberts, Mitesh R. Meswani, Vilas Sridharan, Daniel I. Lowell | 2019-07-30 |
| 10318363 | System and method for energy reduction based on history of reliability of a system | Greg Sadowski, Shomit N. Das, Wayne Burleson | 2019-06-11 |
| 9594648 | Controlling non-redundant execution in a redundant multithreading (RMT) processor | Glenn J. Hinton, Sebastien Hily, John G. Holm, Ronak Singhal, Avinash Sodani +1 more | 2017-03-14 |
| 9081688 | Obtaining data for redundant multithreading (RMT) execution | Glenn J. Hinton, Sebastien Hily, John G. Holm, Ronak Singhal, Avinash Sodani +4 more | 2015-07-14 |
| 8914672 | General purpose hardware to replace faulty core components that may also provide additional processor functionality | Michael Powell, Shubhendu Sekhar Mukherjee, Arijit Biswas | 2014-12-16 |
| 8793689 | Redundant multithreading processor | Glenn J. Hinton, Avinash Sodani, Sebastien Hily, John G. Holm, Ronak Singhal +1 more | 2014-07-29 |
| 8171328 | State history storage for synchronizing redundant processors | Shubhendu Sekhar Mukherjee, Arijit Biswas, Paul Racunas | 2012-05-01 |