Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12367145 | Remote acceleration for data dependent address calculation | William L. Walker, Pongstorn Maidee, William E. Jones, Richard L. Carlson | 2025-07-22 |
| 12118357 | Encoded data dependency matrix for power efficiency scheduling | Rajesh Kumar Arunachalam, Manivannan Bhoopathy, Hon-Hin Wong | 2024-10-15 |
| 11847463 | Masked multi-lane instruction memory fault handling using fast and slow execution paths | Kai Troester, John M. King, Michael Estlick, Erik Swanson, Robert Weidner | 2023-12-19 |
| 11113065 | Speculative instruction wakeup to tolerate draining delay of memory ordering violation check buffers | John Kalamatianos, Susumu Mashimo, Krishnan V. Ramani | 2021-09-07 |
| 10949201 | Processor with accelerated lock instruction operation | Marius Evers, Krishnan V. Ramani, Thomas Kunjan | 2021-03-16 |
| 9916243 | Method and apparatus for performing a bus lock and translation lookaside buffer invalidation | William L. Walker, Paul James Moyer, Richard Martin Born, Eric Christopher Morton, David S. Christie +1 more | 2018-03-13 |