Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12386750 | Last level cache hierarchy in chiplet based processors | Srikanth Reddy Gruddanti, Krishnaiah Gummidipudi, Prasant Kumar Vallur, Ramon Mangaser | 2025-08-12 |
| 12321294 | Data lane variation compensation for data rate enhancement | Srikanth Reddy Gruddanti, Ramon Mangaser, Prasant Kumar Vallur, Manoj N. Kulkarni | 2025-06-03 |
| 12015412 | Dual phase clock distribution from a single source in a die-to-die interface | Srikanth Reddy Gruddanti, Pradeep Jayaraman, Ramon Mangaser, Prasant Kumar Vallur, Krishna Reddy Mudimela Venkata | 2024-06-18 |
| 11960435 | Skew matching in a die-to-die interface | Pradeep Jayaraman, Dean E. Gonzales, Gerald R. Talbot, Ramon Mangaser, Michael J. Tresidder +3 more | 2024-04-16 |
| 11011495 | Multiple-die integrated circuit with integrated voltage regulator | Milind S. Bhagavat, Rahul Agarwal | 2021-05-18 |
| 10366734 | Programmable write word line boost for low voltage memory operation | Alexander W. Schaefer, Ravi Jotwani, Samiul Haque Khan, Stephen V. Kosonocky, John Wuu +1 more | 2019-07-30 |
| 10049726 | Contention-free dynamic logic | Alexander W. Schaefer | 2018-08-14 |
| 8788789 | Power filter in data translation look-aside buffer based on an input linear address | Deepika Kapil | 2014-07-22 |
| 8683179 | Method and apparatus for performing store-to-load forwarding from an interlocking store using an enhanced load/store unit in a processor | Krishnan V. Ramani, Chitresh Narasimhaiah | 2014-03-25 |
| 8503210 | Conditionally precharged dynamic content addressable memory | Mandeep Singh, Hung Phuong Ngo | 2013-08-06 |
| 8374039 | Multi-port memory array | Jimmy Lee Reaves | 2013-02-12 |
| 7467264 | Methods and apparatuses for determining the state of a memory element | Richard Hilton, Anthony Holden, Steven C. Johnson, Kenneth K. Smith | 2008-12-16 |
| 7290118 | Address control system for a memory storage device | Kenneth K. Smith, Sarah Brandenberger, Terrel Munden, Frederick Perner, Connie Lemus | 2007-10-30 |
| 7215175 | Fuse sensing scheme with auto current reduction | Gurupada Mandal, Suresh Seshadri, Raymond A. Heald, William Yeh-Yung Mo | 2007-05-08 |
| 7036068 | Error correction coding and decoding in a solid-state storage device | James Davis, Jonathan Jedwab, Kenneth Graham Paterson, Frederick Perner, Gadiel Seroussi +2 more | 2006-04-25 |
| 6999366 | Magnetic memory including a sense result category between logic states | Frederick Perner, Jonathan Jedwab, James Davis, David Banks, Stewart Wyatt +1 more | 2006-02-14 |
| 6809958 | MRAM parallel conductor orientation for improved write performance | Darrel Bloomquist | 2004-10-26 |
| 6717874 | Systems and methods for reducing the effect of noise while reading data in series from memory | Frederick Perner, Jonathan Jedwab, Anthony Holden | 2004-04-06 |
| 6678197 | Systems and methods for reducing the effect of noise while reading data from memory | Frederick Perner, Kenneth K. Smith, Sarah Brandenberger, Terrel Munden, Robert Sesek | 2004-01-13 |
| 5831302 | Voltage reference circuit | — | 1998-11-03 |
| 5757814 | Memory and test method therefor | — | 1998-05-26 |
| 5652721 | Testing an integrated circuit device | — | 1997-07-29 |
| 5629611 | Current generator circuit for generating substantially constant current | — | 1997-05-13 |
| 5619449 | Bit line sensing in a memory array | — | 1997-04-08 |
| 5610506 | Voltage reference circuit | — | 1997-03-11 |