Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Contention-free dynamic logic

Contention-free dynamic logic

US Patent 10049726 · Granted Aug 14, 2018

Estimated economic value: $10,336,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Last level cache hierarchy in chiplet based processors2025
Data lane variation compensation for data rate enhancement2025
Dual phase clock distribution from a single source in a die-to-die interface2024
Skew matching in a die-to-die interface2024
Multiple-die integrated circuit with integrated voltage regulator2021
Programmable write word line boost for low voltage memory operation2019
Programmable write word line boost for low voltage memory operation2019
Power filter in data translation look-aside buffer based on an input linear addr2014
Method and apparatus for performing store-to-load forwarding from an interlockin2014
Conditionally precharged dynamic content addressable memory2013
Multi-port memory array2013
Apparatus for testing embedded memory read paths2011