| 12488171 |
Through silicon via macro with dense layout for placement in an integrated circuit floorplan |
Michael Griffith, Aaron Keiichi Horiuchi, Donald Clay, Eric Busta, Hye Jung Stanford +5 more |
2025-12-02 |
|
| 12456500 |
Control of dual-voltage memory operation |
— |
2025-10-28 |
|
| 12414283 |
Devices and systems for flying bitline with jumper cell |
Sahilpreet Singh, John Wuu, Kerrie Vercant Underhill, Ricardo Cantu |
2025-09-09 |
|
| 12327608 |
Wrong way read-before write solutions in SRAM |
Sahilpreet Singh |
2025-06-10 |
|
| 12300311 |
Multipurpose wordline underdrive circuits, devices, and systems |
Sahilpreet Singh |
2025-05-13 |
|
| 12165700 |
SRAM power savings and write assist |
John Wuu, Keith Kasprak |
2024-12-10 |
$237,856,000 |
| 12073919 |
Dual read port latch array bitcell |
Arijit Banerjee, John Wuu |
2024-08-27 |
$259,969,000 |
| 12066948 |
Dynamic banking and bit separation in memories |
— |
2024-08-20 |
$154,333,000 |
| 12033721 |
Split read port latch array bit cell |
Arijit Banerjee, John Wuu |
2024-07-09 |
$258,431,000 |
| 12009025 |
Weak precharge before write dual-rail SRAM write optimization |
Tawfik Ahmed, Andrew J. Robison |
2024-06-11 |
$351,719,000 |
| 11929114 |
Rapid tag invalidation circuit |
Kyle David Whittle |
2024-03-12 |
$1,028,196,000 |
| 11907070 |
Methods and apparatus for managing register free lists |
Eric Busta, Michael L. Golden, Sean M. O′Mullan, James A. Wingfield, Keith Kasprak +1 more |
2024-02-20 |
$577,869,000 |
| 11854652 |
Sense amplifier sleep state for leakage savings without bias mismatch |
Ryan T. Freese, Eric Busta |
2023-12-26 |
$301,983,000 |
| 11715514 |
Latch bit cells |
John Wuu |
2023-08-01 |
$238,969,000 |
| 11610879 |
Power on die discovery in 3D stacked die architectures with varying number of stacked die |
Richard Martin Born, Carl Dietz, William A. Halliday |
2023-03-21 |
$410,108,000 |
| 11610627 |
Write masked latch bit cell |
John Wuu |
2023-03-21 |
$410,108,000 |
| 11527270 |
Hybrid library latch array |
John Wuu |
2022-12-13 |
$287,886,000 |
| 11514956 |
Sense amplifier sleep state for leakage savings without bias mismatch |
Ryan T. Freese, Eric Busta |
2022-11-29 |
$217,316,000 |
| 11356093 |
Even/odd die aware signal distribution in stacked die device |
— |
2022-06-07 |
$854,419,000 |
| 11281592 |
Dynamic banking and bit separation in memories |
— |
2022-03-22 |
$270,679,000 |
| 11264115 |
Integrated circuit memory with built-in self-test (BIST) |
Keith Kasprak, Vance Threatt, James A. Wingfield, William A. Halliday, Srinivas R. Sathu +1 more |
2022-03-01 |
$213,052,000 |
| 11227651 |
Static random access memory read path with latch |
Arijit Banerjee, Kyle David Whittle |
2022-01-18 |
$263,340,000 |
| 10872641 |
Nwell and subtrate taps in memory layout |
Keith Kasprak |
2020-12-22 |
$177,143,000 |
| 10839875 |
Timer for use dual voltage supplies |
Srinivas R. Sathu, John Wuu, Martin Paul Piorkowski |
2020-11-17 |
$196,313,000 |
| 10644826 |
Flexibile interfaces using through-silicon via technology |
John Wuu, Samuel D. Naffziger, Michael Kevin Ciraula |
2020-05-05 |
$25,055,000 |
