| 12165700 |
SRAM power savings and write assist |
Russell Schreiber, John Wuu |
2024-12-10 |
| 11907070 |
Methods and apparatus for managing register free lists |
Eric Busta, Michael L. Golden, Sean M. O′Mullan, James A. Wingfield, Russell Schreiber +1 more |
2024-02-20 |
| 11264115 |
Integrated circuit memory with built-in self-test (BIST) |
Russell Schreiber, Vance Threatt, James A. Wingfield, William A. Halliday, Srinivas R. Sathu +1 more |
2022-03-01 |
| 10872641 |
Nwell and subtrate taps in memory layout |
Russell Schreiber |
2020-12-22 |
| 10747931 |
Shift of circuit periphery layout to leverage optimal use of available metal tracks in periphery logic |
Patrick W. Shaw |
2020-08-18 |
| 10438636 |
Capacitive structure for memory write assist |
Tawfik Ahmed, Amlan Ghosh, Ricardo Cantu |
2019-10-08 |
| 10043572 |
VSS bitcell sleep scheme involving modified bitcell for terminating sleep regions |
Russell Schreiber, John Wuu |
2018-08-07 |
| 9355743 |
Memory array test logic |
Amlan Ghosh, John Wuu, John R. Riley |
2016-05-31 |
| 9053257 |
Voltage-aware signal path synchronization |
Russell Schreiber, John Wuu |
2015-06-09 |
| 8958236 |
Memory cell flipping for mitigating SRAM BTI |
John Wuu, Russell Schreiber |
2015-02-17 |
| 8018253 |
Sense amplifier circuit and related configuration and operation methods |
Russell Schreiber |
2011-09-13 |
| 7961536 |
Memory device and methods thereof |
Russell Schreiber |
2011-06-14 |
| 7940580 |
Voltage shifting word-line driver and method therefor |
Russell Schreiber, Martin Paul Piorkowski |
2011-05-10 |
| 7933760 |
Bitcell simulation device and methods |
Russell Schreiber, Donald A. Priore |
2011-04-26 |