Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10509752 | Configuration of multi-die modules with through-silicon vias | John Wuu, Michael Kevin Ciraula, Patrick J. Shyvers | 2019-12-17 |
| 10366734 | Programmable write word line boost for low voltage memory operation | Alexander W. Schaefer, Ravi Jotwani, Samiul Haque Khan, David Hugh McIntyre, Stephen V. Kosonocky +1 more | 2019-07-30 |
| 10331196 | Reduced setup time clock gating circuit | — | 2019-06-25 |
| 10303398 | Swizzling in 3D stacked memory | John Wuu, Michael Kevin Ciraula, Samuel D. Naffziger | 2019-05-28 |
| 10043572 | VSS bitcell sleep scheme involving modified bitcell for terminating sleep regions | John Wuu, Keith Kasprak | 2018-08-07 |
| 9953687 | Pseudo-dynamic circuit for multi-voltage timing interlocks | John Wuu, Ryan T. Freese | 2018-04-24 |
| 9891271 | Techniques and circuits for testing a virtual power supply at an integrated circuit device | Joel Thornton Irby, Sudha Thiruvengadam, Carl Dietz | 2018-02-13 |
| 9575891 | Sidecar SRAM for high granularity in floor plan aspect ratio | John R. Riley, Donald R. Weiss, John Wuu, William McGee | 2017-02-21 |
| 9373418 | Circuit and data processor with headroom monitoring and method therefor | Stephen V. Kosonocky, Amlan Ghosh | 2016-06-21 |
| 9257199 | Canary circuit with passgate transistor variation | — | 2016-02-09 |
| 9053257 | Voltage-aware signal path synchronization | John Wuu, Keith Kasprak | 2015-06-09 |
| 9013949 | Memory access control system and method | Vikram Suresh | 2015-04-21 |
| 8958236 | Memory cell flipping for mitigating SRAM BTI | John Wuu, Keith Kasprak | 2015-02-17 |
| 8625373 | Voltage shifting sense amplifier for SRAM VMIN improvement | — | 2014-01-07 |
| 8305835 | Memory elements having configurable access duty cycles and related operating methods | Martin Paul Piorkowski, Atif Habib, Peter Labrecque | 2012-11-06 |
| 8018253 | Sense amplifier circuit and related configuration and operation methods | Keith Kasprak | 2011-09-13 |
| 7961536 | Memory device and methods thereof | Keith Kasprak | 2011-06-14 |
| 7940580 | Voltage shifting word-line driver and method therefor | Keith Kasprak, Martin Paul Piorkowski | 2011-05-10 |
| 7933760 | Bitcell simulation device and methods | Keith Kasprak, Donald A. Priore | 2011-04-26 |
| 7398495 | Method and apparatus for characterizing arrays using cell-based timing elements | David M. Newmark, Joe Spector | 2008-07-08 |