Issued Patents All Time
Showing 1–25 of 128 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431873 | Low-power flip flop circuit | Po-Chia Lai, Meng-Hung Shen, Chi-Lin Liu, Stefan Rusu, Yan-Hao Chen | 2025-09-30 |
| 12407337 | Flip-flop circuit and method | Yung-Chen Chien, Xiangdong Chen, Hui-Zhong Zhuang, Tzu-Ying Lin, Lee-Chung Lu | 2025-09-02 |
| 12401348 | Footprint for multi-bit flip flop | Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen, Tzu-Ying Lin | 2025-08-26 |
| 12394715 | Diagonal backside power and signal routing for an integrated circuit | Sheng-Hsiung Chen, Kuo-Nan Yang, Jack Liu | 2025-08-19 |
| 12395157 | Footprint for multi-bit flip flop | Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen, Tzu-Ying Lin | 2025-08-19 |
| 12369389 | Integrated circuit in hybrid row height structure | Hui-Zhong Zhuang, Li-Chung Hsu, Sung-Yen Yeh, Yung-Chen Chien, Jung-Chan Yang +1 more | 2025-07-22 |
| 12353816 | Structure and method of rectangular cell in semiconductor device | Pochun Wang, Jung-Chan Yang, Hui-Zhong Zhuang, Tzu-Ying Lin, Chung-Hsing Wang | 2025-07-08 |
| 12355446 | Data retention circuit and method | Kai-Chi Huang, Yung-Chen Chien, Chi-Lin Liu, Wei-Hsiang Ma, Shang-Chih Hsieh +1 more | 2025-07-08 |
| 12346285 | Diagonal torus network | Huang-Yu Chen, Yung-Chen Chien, Tzu-Ying Lin, Wei-Hsiang Ma, Chung-Hsing Wang | 2025-07-01 |
| 12346645 | Semiconductor device and method and system of arranging patterns of the same | Anurag Verma, Meng-Kai Hsu, Johnny Chiahao Li, Sheng-Hsiung Chen, Cheng-Yu Lin +1 more | 2025-07-01 |
| 12336295 | Integrated circuit device and method | Wei-Ren Chen, Cheng-Yu Lin, Hui-Zhong Zhuang, Yung-Chen Chien, Huang-Yu Chen +1 more | 2025-06-17 |
| 12315862 | Integrated circuit device with improved layout | Fong-Yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin +2 more | 2025-05-27 |
| 12282723 | Standard cell characterization for internal conductive line of cell | SHI-HAN ZHANG, You-Cheng Lai, PEI-WEI LIAO, Shang-Chih Hsieh, Meng-Kai Hsu +1 more | 2025-04-22 |
| 12278240 | IC logic device, layout, system, and method | I-Wen Wang, Chia-Chun Wu, Hui-Zhong Zhuang, Yung-Chen Chien, Xiangdong Chen | 2025-04-15 |
| 12243741 | Semiconductor structure and method for forming the same | Johnny Chiahao Li, Shih-Ming Chang, Ken-Hsien Hsieh, Chi-Yu Lu, Yung-Chen Chien +2 more | 2025-03-04 |
| 12218670 | Flip-flops having strong transistors and weak transistors | I-Wen Wang, Po-Chih CHENG, Jia-Hong GAO, Kuang-Ching Chang, Tzu-Ying Lin | 2025-02-04 |
| 12210811 | Layout context-based cell timing characterization | Zhe-Wei Jiang, Sung-Yen Yeh, Li-Chung Hsu | 2025-01-28 |
| 12199612 | Flip-flop with transistors having different threshold voltages, semiconductor device including same and methods of manufacturing same | Xing Yin, Huaixin XIAN, Hui-Zhong Zhuang, Yung-Chen Chien, Xiangdong Chen | 2025-01-14 |
| 12190034 | Logic circuits with reduced transistor counts | Chi-Lin Liu, Wei-Hsiang Ma, Lee-Chung Lu, Fong-Yuan Chang, Sheng-Hsiung Chen +1 more | 2025-01-07 |
| 12175180 | Systems and methods for context aware circuit design | Li-Chung Hsu, Yen-Pin Chen, Sung-Yen Yeh, Chung-Hsing Wang | 2024-12-24 |
| 12166487 | Bi-directional scan flip-flop circuit and method | Huaixin XIAN, Tzu-Ying Lin, Liu HAN, Qingchao Meng, Xiangdong Chen | 2024-12-10 |
| 12142637 | Semiconductor device and method of manufacturing the same | Cheng-Yu Lin, Yi-Lin FAN, Hui-Zhong Zhuang, Sheng-Hsiung Chen, Xiangdong Chen | 2024-11-12 |
| 12107581 | Clock gating circuit and method of operating the same | Seid Hadi Rasouli, Xiangdong Chen, Tzu-Ying Lin, Yung-Chen Chien, Hui-Zhong Zhuang +1 more | 2024-10-01 |
| 12099090 | Multiplexer for SDFQ having differently-sized scan and data transistors, semiconductor device including same and methods of manufacturing same | Huaixin XIAN, Changlin Huang, Qingchao Meng | 2024-09-24 |
| 12081215 | Level shifter circuit and method of operating the same | Yu-Lun Ou, Ji-Yung LIN, Yung-Chen Chien, Ruei-Wun SUN, Wei-Hsiang Ma +2 more | 2024-09-03 |