Issued Patents All Time
Showing 1–25 of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12346645 | Semiconductor device and method and system of arranging patterns of the same | Anurag Verma, Johnny Chiahao Li, Sheng-Hsiung Chen, Cheng-Yu Lin, Hui-Zhong Zhuang +1 more | 2025-07-01 |
| 12282723 | Standard cell characterization for internal conductive line of cell | SHI-HAN ZHANG, You-Cheng Lai, Jerry Chang Jui Kao, PEI-WEI LIAO, Shang-Chih Hsieh +1 more | 2025-04-22 |
| 12277379 | Method and system for generating layout diagram including wiring arrangement | Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Pin-Dai Sue, Po-Hsiang Huang +3 more | 2025-04-15 |
| 12216978 | Routing structure of semiconductor device and forming method thereof | Anurag Verma, Chih-Wei Chang, Sang-Chi Huang, Wei Ling Chang, Hui-Zhong Zhuang | 2025-02-04 |
| 12216981 | System and method for generating layout diagram including wiring arrangement | Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Pin-Dai Sue, Po-Hsiang Huang +3 more | 2025-02-04 |
| 12164853 | Method for generating routing structure of semiconductor device | Anurag Verma, Chi-Chun Liang, Cheng-Yu Lin, Pochun Wang, Hui-Zhong Zhuang | 2024-12-10 |
| 11943939 | Integrated circuit device and method | Jerry Chang Jui Kao, Chin-Shen Lin, Ming-Tao Yu, Tzu-Ying Lin, Chung-Hsing Wang | 2024-03-26 |
| 11829700 | Method of analyzing and detecting critical cells | Anurag Verma, Chih-Wei Chang | 2023-11-28 |
| 11790151 | System for generating layout diagram including wiring arrangement | Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Pin-Dai Sue, Po-Hsiang Huang +3 more | 2023-10-17 |
| 11775727 | Method for generating layout diagram including wiring arrangement | Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Pin-Dai Sue, Po-Hsiang Huang +3 more | 2023-10-03 |
| 11741286 | Method and system of generating a layout diagram | Sheng-Hsiung Chen, Wai-Kei Mak, Ting-Chi Wang, Yu-Hsiang Cheng, Ding-Wei Huang | 2023-08-29 |
| 11288436 | Method of analyzing and detecting critical cells | Anurag Verma, Chih-Wei Chang | 2022-03-29 |
| 11062076 | Method and system of generating a layout diagram | Sheng-Hsiung Chen, Wai-Kei Mak, Ting-Chi Wang, Yu-Hsiang Cheng, Ding-Wei Huang | 2021-07-13 |
| 10977420 | Method of decomposing a layout for multiple-patterning lithography | Wen-Hao Chen | 2021-04-13 |
| 10943046 | Semiconductor apparatus including uncrowned and crowned cells and method of making | Prasenjit Ray, Lee-Chung Lu, Wen-Hao Chen, Yuan-Te Hou | 2021-03-09 |
| 10776551 | Method and system of revising a layout diagram | Sheng-Hsiung Chen, Wai-Kei Mak, Ting-Chi Wang, Yu-Hsiang Cheng, Ding-Wei Huang | 2020-09-15 |
| 10713410 | Method for legalizing mixed-cell height standard cells of IC | Chao Wang, Yen-Yi Wu, Shih-Chun Chen, Yao-Wen Chang | 2020-07-14 |
| 10643017 | Rule checking for multiple patterning technology | Yuan-Te Hou, Wen-Hao Chen | 2020-05-05 |
| 10515186 | Method of decomposing a layout for multiple-patterning lithography | Wen-Hao Chen | 2019-12-24 |
| 10452805 | Method of reconfiguring uncrowned standard cells and semiconductor apparatus including uncrowned and crowned cells | Prasenjit Ray, Lee-Chung Lu, Wen-Hao Chen, Yuan-Te Hou | 2019-10-22 |
| 10275559 | Method for legalizing mixed-cell height standard cells of IC | Chao Wang, Yen-Yi Wu, Shih-Chun Chen, Yao-Wen Chang | 2019-04-30 |
| 10275562 | Method of decomposing a layout for multiple-patterning lithography | Wen-Hao Chen | 2019-04-30 |
| 10169520 | Method of reconfiguring uncrowned standard cells and semiconductor apparatus including uncrowned and crowned cells | Prasenjit Ray, Lee-Chung Lu, Wen-Hao Chen, Yuan-Te Hou | 2019-01-01 |
| 10162929 | Systems and methods for using multiple libraries with different cell pre-coloring | Yuan-Te Hou, Wen-Hao Chen | 2018-12-25 |
| 10140407 | Method, device and computer program product for integrated circuit layout generation | Chia-Ming Ho, Adari Rama Bhadra Rao, Kuang-Hung Chang, Ke-Ying Su, Wen-Hao Chen +1 more | 2018-11-27 |