RG

Ramesh Gunna

Apple: 43 patents #667 of 18,612Top 4%
PS P.A. Semi: 3 patents #8 of 30Top 30%
📍 San Jose, CA: #1,113 of 32,062 inventorsTop 4%
🗺 California: #9,121 of 386,348 inventorsTop 3%
Overall (All Time): #62,170 of 4,157,543Top 2%
46
Patents All Time

Issued Patents All Time

Showing 26–46 of 46 patents

Patent #TitleCo-InventorsDate
8352685 Combining write buffer with dynamically adjustable flush metrics Peter J. Bannon, Andrew J. Beaumont-Smith, Wei-Han Lien, Brian P. Lilly, Jaidev P. Patwardhan +2 more 2013-01-08
8347040 Latency reduction for cache coherent bus-based cache Brian P. Lilly, Sridhar Subramanian 2013-01-01
8341379 R and C bit update handling Jesse Pan 2012-12-25
8301843 Data cache block zero implementation Sudarshan Kadambi, Peter J. Bannon 2012-10-30
8255670 Replay reduction for power saving Po-Yung Chang, Wei-Han Lien, Jesse Pan, Tse-Yu Yeh, James B. Keller 2012-08-28
8239638 Store handling in a processor Po-Yung Chang, Sudarshan Kadambi 2012-08-07
8171326 L1 flush mechanism to flush cache for power down and handle coherence during flush and/or after power down James B. Keller, Tse-Yu Yeh, Brian J. Campbell 2012-05-01
8131946 Converting victim writeback to a fill Sudarshan Kadambi 2012-03-06
7991928 Retry mechanism James B. Keller, Sridhar Subramanian 2011-08-02
7970970 Non-blocking address switch with shallow per agent queues Sridhar Subramanian, James B. Keller, Ruchi Wadhawan, George Kong Yiu 2011-06-28
7949832 Latency reduction for cache coherent bus-based cache Brian P. Lilly, Sridhar Subramanian 2011-05-24
7836262 Converting victim writeback to a fill Sudarshan Kadambi 2010-11-16
7752474 L1 cache flush when processor is entering low power mode James B. Keller, Tse-Yu Yeh, Brian J. Campbell 2010-07-06
7752366 Non-blocking address switch with shallow per agent queues Sridhar Subramanian, James B. Keller, Ruchi Wadhawan, George Kong Yiu 2010-07-06
7739476 R and C bit update handling Jesse Pan 2010-06-15
7707361 Data cache block zero implementation Sudarshan Kadambi, Peter J. Bannon 2010-04-27
7702858 Latency reduction for cache coherent bus-based cache Brian P. Lilly, Sridhar Subramanian 2010-04-20
7647518 Replay reduction for power saving Po-Yung Chang, Wei-Han Lien, Jesse Pan, Tse-Yu Yeh, James B. Keller 2010-01-12
7529866 Retry mechanism in cache coherent communication among agents James B. Keller, Sridhar Subramanian 2009-05-05
7461190 Non-blocking address switch with shallow per agent queues Sridhar Subramanian, James B. Keller, Ruchi Wadhawan, George Kong Yiu 2008-12-02
7398361 Combined buffer for snoop, store merging, load miss, and writeback operations Po-Yung Chang, Sridhar Subramanian, James B. Keller, Tse-Yuh Yeh 2008-07-08