HK

Harshavardhan Kaushikkar

Apple: 41 patents #713 of 18,612Top 4%
🗺 California: #10,539 of 386,348 inventorsTop 3%
Overall (All Time): #71,763 of 4,157,543Top 2%
42
Patents All Time

Issued Patents All Time

Showing 1–25 of 42 patents

Patent #TitleCo-InventorsDate
12399830 Scalable system on a chip Per Hammarlund, Eran Tamari, Lior Zimet, Sergio Kolor, Sergio V. Tota +6 more 2025-08-26
12353913 Handling eviction write operations caused by rate-limited traffic Gregory S. Mathews, Lakshmi Narasimha Murthy Nukala 2025-07-08
12332792 Scalable cache coherency protocol James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more 2025-06-17
12236130 Address hashing in a multiple memory controller system Steven Fishwick, Lior Zimet 2025-02-25
12039169 Bandwidth-aware fabric traffic shaping Anjana Subramanian, Rohit Natarajan, Yu Zhang, Mukul Joshi, Jeonghee Shin +1 more 2024-07-16
12007895 Scalable system on a chip Per Hammarlund, Eran Tamari, Lior Zimet, Sergio Kolor, Sergio V. Tota +6 more 2024-06-11
11947457 Scalable cache coherency protocol James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more 2024-04-02
11941428 Ensuring transactional ordering in I/O agent Sagi Lahav, Lital Levy-Rubin, Gaurav Garg, Gerard R. Williams, III, Samer Nassar +3 more 2024-03-26
11934313 Scalable system on a chip Per Hammarlund, Lior Zimet, James Vash, Gaurav Garg, Sergio Kolor +2 more 2024-03-19
11868258 Scalable cache coherency protocol James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more 2024-01-09
11824795 Communication channels with both shared and independent resources Rohit Gupta, Gregory S. Mathews, Jeonghee Shin, Rohit Natarajan 2023-11-21
11803471 Scalable system on a chip Per Hammarlund, Lior Zimet, Sergio Kolor, Sagi Lahav, James Vash +11 more 2023-10-31
11755489 Configurable interface circuit Rohit Gupta, Rohit Natarajan, Jurgen Schulz, Connie W. Cheung 2023-09-12
11693585 Address hashing in a multiple memory controller system Steven Fishwick, Lior Zimet 2023-07-04
11675722 Multiple independent on-chip interconnect Sergio Kolor, Sergio V. Tota, Tzach Zemer, Sagi Lahav, Jonathan Redshaw +8 more 2023-06-13
11550716 I/O agent Gaurav Garg, Sagi Lahav, Lital Levy-Rubin, Gerard R. Williams, III, Samer Nassar +4 more 2023-01-10
11544193 Scalable cache coherency protocol James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more 2023-01-03
11537538 Inter cluster snoop latency reduction Christopher D. Shuler, Srinivasa Rangan Sridharan, Yu Zhang, Kaushik Kannan, Deniz Balkan 2022-12-27
11275616 Resource access management Sridhar Kotha, Srinivasa Rangan Sridharan, Xiaoming Wang 2022-03-15
11138111 Parallel coherence and memory cache processing pipelines Muditha Kanchana, Srinivasa Rangan Sridharan, Sridhar Kotha, Brian P. Lilly 2021-10-05
11030102 Reducing memory cache control command hops on a fabric Rong Zhang Hu, Xiaoming Wang 2021-06-08
11016913 Inter cluster snoop latency reduction Christopher D. Shuler, Srinivasa Rangan Sridharan, Yu Zhang, Kaushik Kannan, Deniz Balkan 2021-05-25
10877888 Systems and methods for providing distributed global ordering Sridhar Kotha, Srinivasa Rangan Sridharan, Xiaoming Wang, Yu Zhang 2020-12-29
10802968 Processor to memory with coherency bypass Sukalpa Biswas, Munetoshi Fukami, Gurjeet S. Saund, Manu Gulati, Shinye Shiu 2020-10-13
10795818 Method and apparatus for ensuring real-time snoop latency Per Hammarlund, Brian P. Lilly, Michael Bekerman, James Vash, Manu Gulati +1 more 2020-10-06