Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10802968 | Processor to memory with coherency bypass | Sukalpa Biswas, Harshavardhan Kaushikkar, Munetoshi Fukami, Gurjeet S. Saund, Manu Gulati | 2020-10-13 |
| 10607977 | Integrated DRAM with low-voltage swing I/O | — | 2020-03-31 |
| 10310586 | Memory power savings in idle display case | Sukalpa Biswas, Cyril de la Cropte de Chanterac, Manu Gulati, Pulkit Desai, Rong Zhang Hu | 2019-06-04 |
| 10203901 | Transparent hardware-assisted memory decompression | Vyacheslav V. Malyugin, Luigi Semenzato, Choon Ping Chng, Santhosh Rao | 2019-02-12 |
| 10089239 | Memory system architecture | Allan D. Knies, Chih-Chung Chang, Vyacheslav V. Malyugin, Santhosh Rao | 2018-10-02 |
| 9892054 | Method and apparatus for monitoring system performance and dynamically updating memory sub-system settings using software to optimize performance and power consumption | — | 2018-02-13 |
| 9864541 | Transparent hardware-assisted memory decompression | Vyacheslav V. Malyugin, Luigi Semenzato, Choon Ping Chng, Santhosh Rao | 2018-01-09 |
| 9785571 | Methods and systems for memory de-duplication | — | 2017-10-10 |
| 9740631 | Hardware-assisted memory compression management using page filter and system MMU | — | 2017-08-22 |
| 9465740 | Coherence processing with pre-kill mechanism to avoid duplicated transaction identifiers | Erik P. Machnicki, Harshavardhan Kaushikkar | 2016-10-11 |
| 9400544 | Advanced fine-grained cache power management | Wolfgang H. Klingauf, Rong Zhang Hu, Sukalpa Biswas | 2016-07-26 |
| 9396122 | Cache allocation scheme optimized for browsing applications | Sukalpa Biswas, Wolfgang H. Klingauf, Rong Zhang Hu | 2016-07-19 |
| 9311251 | System cache with sticky allocation | Sukalpa Biswas, James Wang | 2016-04-12 |
| 9280471 | Mechanism for sharing private caches in a SoC | Manu Gulati, Harshavardhan Kaushikkar, Gurjeet S. Saund, Wei-Han Lien, Gerard R. Williams, III +2 more | 2016-03-08 |
| 9261939 | Memory power savings in idle display case | Sukalpa Biswas, Cyril de la Cropte de Chanterac, Manu Gulati, Pulkit Desai, Rong Zhang Hu | 2016-02-16 |
| 9218286 | System cache with partial write valid states | Sukalpa Biswas | 2015-12-22 |
| 9218040 | System cache with coarse grain power management | Sukalpa Biswas, Rong Zhang Hu | 2015-12-22 |
| 9201796 | System cache with speculative read engine | Sukalpa Biswas | 2015-12-01 |
| 9158685 | System cache with cache hint control | Sukalpa Biswas, James Wang | 2015-10-13 |
| 9135177 | Scheme to escalate requests with address conflicts | Sukalpa Biswas | 2015-09-15 |
| 9043570 | System cache with quota-based control | Sukalpa Biswas, James Wang | 2015-05-26 |
| 8984227 | Advanced coarse-grained cache power management | Sukalpa Biswas, Wolfgang H. Klingauf, Rong Zhang Hu | 2015-03-17 |
| 8977817 | System cache with fine grain power management | Sukalpa Biswas | 2015-03-10 |
| 8912853 | Dynamic level shifter circuit and ring oscillator using the same | James E. Burnette, II, Greg M. Hess | 2014-12-16 |
| 8886886 | System cache with sticky removal engine | Sukalpa Biswas, James Wang, Robert Hu | 2014-11-11 |