Issued Patents All Time
Showing 1–25 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10402168 | Low energy consumption mantissa multiplication for floating point multiply-add operations | William C. Hasenplaugh, Kermin Fleming, Simon C. Steely, Jr. | 2019-09-03 |
| 9317263 | Hardware compilation and/or translation with fault detection and roll back functionality | Nicholas Cheng Hwa Chee, William C. Hasenplaugh | 2016-04-19 |
| 9294419 | Scalable multi-layer 2D-mesh routers | William C. Hasenplaugh, Judson S. Leonard | 2016-03-22 |
| 9250682 | Distributed power management for multi-core processors | William C. Hasenplaugh | 2016-02-02 |
| 8924690 | Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction | George Z. Chrysos, Todd Dutton | 2014-12-30 |
| 8893094 | Hardware compilation and/or translation with fault detection and roll back functionality | Nicholas Cheng Hwa Chee, William C. Hasenplaugh | 2014-11-18 |
| 8799902 | Priority based throttling for power/performance quality of service | Ramesh Illikkal, Ravishankar Iyer, Jaideep Moses, Don Newell | 2014-08-05 |
| 8769201 | Technique for controlling computing resources | William C. Hasenplaugh, Joel S. Emer, Aamer Jaleel, Simon C. Steely, Jr. | 2014-07-01 |
| 8244980 | Shared cache performance | — | 2012-08-14 |
| 8190863 | Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction | George Z. Chrysos, Todd Dutton | 2012-05-29 |
| 7788519 | Method, system, and apparatus for improving multi-core processor performance | Daniel W. Bailey, Todd Dutton | 2010-08-31 |
| 7392414 | Method, system, and apparatus for improving multi-core processor performance | Daniel W. Bailey, Todd Dutton | 2008-06-24 |
| 7389440 | Method, system, and apparatus for improving multi-core processor performance | Daniel W. Bailey, Todd Dutton | 2008-06-17 |
| 7380169 | Converting merge buffer system-kill errors to process-kill errors | Yaron Shragai, Ugonna Echeruo, Shubhendu Sekhar Mukherjee | 2008-05-27 |
| 7370231 | Method of handling errors | Yaron Shragai, Shubhendu Sekhar Mukherjee | 2008-05-06 |
| 6675192 | Temporary halting of thread execution until monitoring of armed events to memory location identified in working registers | Joel S. Emer, Rebecca L. Stamm, Bruce E. Edwards, Matthew Reilly, Craig B. Zilles +2 more | 2004-01-06 |
| 6493741 | Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit | Joel S. Emer, Rebecca L. Stamm, Bruce E. Edwards, Matthew Reilly, Craig B. Zilles +2 more | 2002-12-10 |
| 5829051 | Apparatus and method for intelligent multiple-probe cache allocation | Simon C. Steely, Jr., Richard B. Gillett, Jr. | 1998-10-27 |
| 5349651 | System for translation of virtual to physical addresses by operating memory management processor for calculating location of physical address in memory concurrently with cache comparing virtual addresses for translation | Ricky C. Hetherington, David A. Webb, David B. Fite, Jr., John E. Murray, Dwight P. Manley | 1994-09-20 |
| 5285323 | Integrated circuit chip having primary and secondary random access memories for a hierarchical cache | Ricky C. Hetherington, Francis X. McKeen, Joseph D. Marci, Joel S. Emer | 1994-02-08 |
| 5222224 | Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system | Michael Flynn, Scott Arnold, Stephen J. DeLaHunt, Ricky C. Hetherington, David J. Webb | 1993-06-22 |
| 5222223 | Method and apparatus for ordering and queueing multiple memory requests | David A. Webb, Ricky C. Hetherington, John E. Murray, Dwight P. Manley | 1993-06-22 |
| 5175837 | Synchronizing and processing of memory access operations in multiprocessor systems using a directory of lock bits | Scott Arnold, James Lee Kann, Stephen J. DeLaHunt | 1992-12-29 |
| 5168573 | Memory device for storing vector registers | Dwight P. Manley, Francis X. McKeen, Michael M. Tahranian | 1992-12-01 |
| 5155854 | System for arbitrating communication requests using multi-pass control unit based on availability of system resources | Michael Flynn | 1992-10-13 |