Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5148528 | Method and apparatus for simultaneously decoding three operands in a variable length instruction when one of the operands is also of variable length | David B. Fite, Jr., John E. Murray | 1992-09-15 |
| 5142634 | Branch prediction | David B. Fite, Jr., John E. Murray, Dwight P. Manley, Michael M. McKeon, Elaine H. Fite +1 more | 1992-08-25 |
| 5142631 | System for queuing individual read or write mask and generating respective composite mask for controlling access to general purpose register | John E. Murray, Mark A. Firstenberg, David B. Fite, Jr., Michael M. McKeon, Wiliam R. Grundmann +4 more | 1992-08-25 |
| 5125083 | Method and apparatus for resolving a variable number of potential memory access conflicts in a pipelined computer system | David B. Fite, Jr., Ricky C. Hetherington, John E. Murray, Jr. David A. Webb | 1992-06-23 |
| 5113521 | Method and apparatus for handling faults of vector instructions causing memory management exceptions | Francis X. McKeen, Dileep Bhandarkar, Cheryl A. Wiecek | 1992-05-12 |
| 5109495 | Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor | David B. Fite, Jr., William R. Grundmann, Dwight P. Manely, Francis X. McKeen, John E. Murray +3 more | 1992-04-28 |
| 5093775 | Microcode control system for digital data processing system | William R. Grundmann, Raymond F. Boucher | 1992-03-03 |
| 5067069 | Control of multiple functional units with parallel operation in a microcoded execution unit | Elaine H. Fite, William R. Grundmann, Francis X. McKeen, Ronald M. Salett | 1991-11-19 |
| 4994996 | Pipelined floating point adder for digital computer | William R. Grundmann, Muhammad S. Hag | 1991-02-19 |
| 4995041 | Write back buffer with error correcting capabilities | Ricky C. Hetherington, Maurice B. Steinman, David A. Webb | 1991-02-19 |
| 4985825 | System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer | David A. Webb, David B. Fite, Jr., Ricky C. Hetherington, Francis X. McKeen, Mark A. Firstenberg +3 more | 1991-01-15 |
| 4982402 | Method and apparatus for detecting and correcting errors in a pipelined computer system | Richard C. Beaven, Michael B. Evans, Ricky C. Hetherington, William R. Grundmann, John E. Murray +1 more | 1991-01-01 |
| 4980817 | Vector register system for executing plural read/write commands concurrently and independently routing data to plural read/write ports | Dwight P. Manley, Francis X. McKeen, Michael Tehranian | 1990-12-25 |
| 4949250 | Method and apparatus for executing instructions for a vector processing system | Dileep Bhandarkar, Robert Supnik, Dwight P. Manley | 1990-08-14 |
| 4888679 | Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements | Ricky C. Hetherington, David B. Fite, Jr., Dwight P. Manley, Francis X. McKeen, John E. Murray | 1989-12-19 |
| 4742451 | Instruction prefetch system for conditional branch instruction for central processor unit | William F. Bruckert, John Anthony Derosa, Richard E. Glackemeyer, Allan E. Helenius, John C. Manton | 1988-05-03 |
| 4583222 | Method and apparatus for self-testing of floating point accelerator processors | Milton L. Shively | 1986-04-15 |