DB

Dileep Bhandarkar

DE Digital Equipment: 12 patents #49 of 2,100Top 3%
IN Intel: 1 patents #18,218 of 30,777Top 60%
Overall (All Time): #388,071 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7249268 Method for performing performance optimization operations for a processor having a plurality of processor cores in response to a stall condition 2007-07-24
5341482 Method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions David N. Cutler, David A. Orbits, Wayne Cardoza, Richard T. Witek 1994-08-23
5317717 Apparatus and method for main memory unit protection using access and fault logic signals David N. Cutler, David A. Orbits, Wayne Cardoza, Richard T. Witek 1994-05-31
5291581 Apparatus and method for synchronization of access to main memory signal groups in a multiprocessor data processing system David N. Cutler, David A. Orbits, Wayne Cardoza, Richard T. Witek 1994-03-01
5278840 Apparatus and method for data induced condition signalling David N. Cutler, David A. Orbits, Wayne Cardoza, Richard T. Witek 1994-01-11
5218712 Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption David N. Cutler, David A. Orbits, Wayne Cardoza, Richard T. Witek 1993-06-08
5148544 Apparatus and method for control of asynchronous program interrupt events in a data processing system David N. Cutler, David A. Orbits, Wayne Cardoza, Richard T. Witek 1992-09-15
5113521 Method and apparatus for handling faults of vector instructions causing memory management exceptions Francis X. McKeen, Tryggve Fossum, Cheryl A. Wiecek 1992-05-12
5063497 Apparatus and method for recovering from missing page faults in vector data processing operations David N. Cutler, David A. Orbits, Wayne Cardoza, Richard T. Witek 1991-11-05
5043867 Exception reporting mechanism for a vector processor Robert Supnik, Steven O. Hobbs 1991-08-27
5008812 Context switching method and apparatus for use in a vector processing system Dave Cutler, Wayne Cardoza, Rich Witek, Dave Orbits 1991-04-16
4949250 Method and apparatus for executing instructions for a vector processing system Robert Supnik, Tryggve Fossum, Dwight P. Manley 1990-08-14
4648030 Cache invalidation mechanism for multiprocessor systems Frank C. Bomba, J. J. Grady, III, Stanley A. Lackey, Jr., Jeffrey W. Mitchell, Reinhard Schumann 1987-03-03