Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12135981 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2024-11-05 |
| 11693691 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2023-07-04 |
| 11416281 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2022-08-16 |
| 11093277 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2021-08-17 |
| 5349651 | System for translation of virtual to physical addresses by operating memory management processor for calculating location of physical address in memory concurrently with cache comparing virtual addresses for translation | Ricky C. Hetherington, David A. Webb, David B. Fite, Jr., John E. Murray, Tryggve Fossum | 1994-09-20 |
| 5222223 | Method and apparatus for ordering and queueing multiple memory requests | David A. Webb, Ricky C. Hetherington, John E. Murray, Tryggve Fossum | 1993-06-22 |
| 5168573 | Memory device for storing vector registers | Tryggve Fossum, Francis X. McKeen, Michael M. Tahranian | 1992-12-01 |
| 5142631 | System for queuing individual read or write mask and generating respective composite mask for controlling access to general purpose register | John E. Murray, Mark A. Firstenberg, David B. Fite, Jr., Michael M. McKeon, Wiliam R. Grundmann +4 more | 1992-08-25 |
| 5142634 | Branch prediction | David B. Fite, Jr., John E. Murray, Michael M. McKeon, Elaine H. Fite, Ronald M. Salett +1 more | 1992-08-25 |
| 5113515 | Virtual instruction cache system using length responsive decoded instruction shifting and merging with prefetch buffer outputs to fill instruction buffer | David B. Fite, Jr., Ricky C. Hetherington, Michael M. McKeon, John E. Murray | 1992-05-12 |
| 5019965 | Method and apparatus for increasing the data storage rate of a computer system having a predefined data path width | David A. Webb, Ricky C. Hetherington, Ronald M. Salett, Trvggve Fossum | 1991-05-28 |
| 4985825 | System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer | David A. Webb, David B. Fite, Jr., Ricky C. Hetherington, Francis X. McKeen, Mark A. Firstenberg +3 more | 1991-01-15 |
| 4980817 | Vector register system for executing plural read/write commands concurrently and independently routing data to plural read/write ports | Tryggve Fossum, Francis X. McKeen, Michael Tehranian | 1990-12-25 |
| 4949250 | Method and apparatus for executing instructions for a vector processing system | Dileep Bhandarkar, Robert Supnik, Tryggve Fossum | 1990-08-14 |
| 4888679 | Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements | Tryggve Fossum, Ricky C. Hetherington, David B. Fite, Jr., Francis X. McKeen, John E. Murray | 1989-12-19 |