Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7401355 | Firewall load balancing using a single physical device | David S. Caplan, Paul Phillips, Michael Thomas Banatt | 2008-07-15 |
| 5276892 | Destination control logic for arithmetic and logic unit for digital data processor | Andrew S. Olesin | 1994-01-04 |
| 5070502 | Defect tolerant set associative cache | — | 1991-12-03 |
| 5043867 | Exception reporting mechanism for a vector processor | Dileep Bhandarkar, Steven O. Hobbs | 1991-08-27 |
| 4949250 | Method and apparatus for executing instructions for a vector processing system | Dileep Bhandarkar, Tryggve Fossum, Dwight P. Manley | 1990-08-14 |
| 4851991 | Central processor unit for digital data processing system including write buffer management mechanism | Paul I. Rubinfeld, G. Michael Uhler | 1989-07-25 |