Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MR

Matthew Reilly — 14 Patents

SISicortex: 5 patents #2 of 6Top 35%
Google: 3 patents #8,096 of 22,993Top 40%
UTUptake Technologies: 2 patents #17 of 71Top 25%
HP: 2 patents #7,666 of 16,619Top 50%
CGCompaq Information Technologies Group: 1 patents #84 of 407Top 25%
DEDigital Equipment: 1 patents #1,005 of 2,100Top 50%
Mountain View, CA: #1,580 of 11,022 inventorsTop 15%
California: #43,920 of 386,348 inventorsTop 15%
Overall (All Time): #332,869 of 4,157,543Top 9%
14 Patents All Time
Matthew Reilly has been granted 14 US patents while listed as an inventor at Sicortex. The first was granted in 1999 and the most recent in July 2023. Matthew Reilly ranks #332,869 of 4,157,543 US inventors in our database (top 8.0%). Patent records list Matthew Reilly in Mountain View, CA, US.

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11711430 Computer system and method for presenting asset insights at a graphical user interface Kirk Gustafson, Mitch Laski, Michael Kerstein, Rohitha Ken Perera, Stephanie Shapiro +3 more 2023-07-25
11695874 System and method for increased call quality and success rate Arvind Jain, Dylan Salisbury, Alex Wiesen, Anthony Jawad, Tomas Lundqvist 2023-07-04
11030067 Computer system and method for presenting asset insights at a graphical user interface Kirk Gustafson, Mitch Laski, Michael Kerstein, Rohitha Ken Perera, Stephanie Shapiro +3 more 2021-06-08
10491749 System and method for increased call quality and success rate Arvind Jain, Dylan Salisbury, Alex Wiesen, Anthony Jawad, Tomas Lundqvist 2019-11-26 $30,207,000
10097694 Method and system for moving phone call participation between carrier and data networks Dylan Salisbury, Anthony Jawad 2018-10-09 $29,422,000
7773616 System and method for communicating on a richly connected multi-processor computer system using a pool of buffers for dynamic association with a virtual channel Nitin D. Godiwala, Judson S. Leonard 2010-08-10
7773617 System and method for arbitration for virtual channels to prevent livelock in a richly-connected multi-processor computer system Nitin D. Godiwala, Judson S. Leonard 2010-08-10
7773618 System and method for preventing deadlock in richly-connected multi-processor computer system using dynamic assignment of virtual channels Judson S. Leonard, Nitin D. Godiwala 2010-08-10
7751344 Computer system and method using a kautz-like digraph to interconnect computer nodes and having control back channel between nodes Judson S. Leonard, Lawrence C. Stewart, Washington Taylor 2010-07-06
7660270 Computer system and method using efficient module and backplane tiling to interconnect computer nodes via a Kautz-like digraph Judson S. Leonard, Lawrence C. Stewart, Washington Taylor 2010-02-09
6925552 Method and system with multiple exception handlers in a processor Matthew Mattina, Shane Bell, Chuan-Hua Chang 2005-08-02 $14,069,000
6675192 Temporary halting of thread execution until monitoring of armed events to memory location identified in working registers Joel S. Emer, Rebecca L. Stamm, Bruce E. Edwards, Craig B. Zilles, Tryggve Fossum +2 more 2004-01-06 $15,903,000
6493741 Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit Joel S. Emer, Rebecca L. Stamm, Bruce E. Edwards, Craig B. Zilles, Tryggve Fossum +2 more 2002-12-10 $18,588,000
5995080 Method and apparatus for interleaving and de-interleaving YUV pixel data Larry L. Biro, Matthew J. Adiletta, William R. Wheeler 1999-11-30