MR

Matthew Reilly

SI Sicortex: 5 patents #2 of 6Top 35%
Google: 3 patents #8,000 of 22,993Top 35%
HP HP: 2 patents #5,870 of 16,619Top 40%
UT Uptake Technologies: 2 patents #17 of 71Top 25%
CG Compaq Information Technologies Group: 1 patents #84 of 407Top 25%
DE Digital Equipment: 1 patents #1,005 of 2,100Top 50%
Overall (All Time): #341,995 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11711430 Computer system and method for presenting asset insights at a graphical user interface Kirk Gustafson, Mitch Laski, Michael Kerstein, Rohitha Ken Perera, Stephanie Shapiro +3 more 2023-07-25
11695874 System and method for increased call quality and success rate Arvind Jain, Dylan Salisbury, Alex Wiesen, Anthony Jawad, Tomas Lundqvist 2023-07-04
11030067 Computer system and method for presenting asset insights at a graphical user interface Kirk Gustafson, Mitch Laski, Michael Kerstein, Rohitha Ken Perera, Stephanie Shapiro +3 more 2021-06-08
10491749 System and method for increased call quality and success rate Arvind Jain, Dylan Salisbury, Alex Wiesen, Anthony Jawad, Tomas Lundqvist 2019-11-26
10097694 Method and system for moving phone call participation between carrier and data networks Dylan Salisbury, Anthony Jawad 2018-10-09
7773616 System and method for communicating on a richly connected multi-processor computer system using a pool of buffers for dynamic association with a virtual channel Nitin D. Godiwala, Judson S. Leonard 2010-08-10
7773617 System and method for arbitration for virtual channels to prevent livelock in a richly-connected multi-processor computer system Nitin D. Godiwala, Judson S. Leonard 2010-08-10
7773618 System and method for preventing deadlock in richly-connected multi-processor computer system using dynamic assignment of virtual channels Judson S. Leonard, Nitin D. Godiwala 2010-08-10
7751344 Computer system and method using a kautz-like digraph to interconnect computer nodes and having control back channel between nodes Judson S. Leonard, Lawrence C. Stewart, Washington Taylor 2010-07-06
7660270 Computer system and method using efficient module and backplane tiling to interconnect computer nodes via a Kautz-like digraph Judson S. Leonard, Lawrence C. Stewart, Washington Taylor 2010-02-09
6925552 Method and system with multiple exception handlers in a processor Matthew Mattina, Shane Bell, Chuan-Hua Chang 2005-08-02
6675192 Temporary halting of thread execution until monitoring of armed events to memory location identified in working registers Joel S. Emer, Rebecca L. Stamm, Bruce E. Edwards, Craig B. Zilles, Tryggve Fossum +2 more 2004-01-06
6493741 Method and apparatus to quiesce a portion of a simultaneous multithreaded central processing unit Joel S. Emer, Rebecca L. Stamm, Bruce E. Edwards, Craig B. Zilles, Tryggve Fossum +2 more 2002-12-10
5995080 Method and apparatus for interleaving and de-interleaving YUV pixel data Larry L. Biro, Matthew J. Adiletta, William R. Wheeler 1999-11-30