AM

Asit K. Mallick

IN Intel: 35 patents #1,016 of 30,777Top 4%
TR Tahoe Research: 1 patents #81 of 215Top 40%
Overall (All Time): #91,978 of 4,157,543Top 3%
36
Patents All Time

Issued Patents All Time

Showing 25 most recent of 36 patents

Patent #TitleCo-InventorsDate
12430162 User-level interprocessor interrupts Gilbert Neiger, Rajesh M. Sankaran, Hisham Shafi, Vedvyas Shanbhogue, Vivekananthan Sanjeepan +1 more 2025-09-30
12340224 Systems, methods, and apparatuses to control CPU speculation for the prevention of side-channel attacks Robert S. Chappell, Jason W. Brandt, Alan Cox, Joseph Nuzman, Arjan Van De Ven 2025-06-24
12253958 System for address mapping and translation protection Ravi L. Sahita, Gilbert Neiger, Vedvyas Shanbhogue, David M. Durham, Andrew V. Anderson +7 more 2025-03-18
12020031 Methods, apparatus, and instructions for user-level thread suspension Michael Mishaeli, Jason W. Brandt, Gilbert Neiger, Rajesh M. Sankaran, Raghunandan Makaram +3 more 2024-06-25
11683310 Protecting supervisor mode information Barry E. Huntley, Gilbert Neiger, H. Peter Anvin, Adriaan Van De Ven, Scott Dion Rodgers 2023-06-20
11675594 Systems, methods, and apparatuses to control CPU speculation for the prevention of side-channel attacks Robert S. Chappell, Jason W. Brandt, Alan Cox, Joseph Nuzman, Arjan Van De Ven 2023-06-13
11630687 Compacted context state management Atul Khare, Leena K. Puthiyedath, Jim Coke, Michael Mishaeli, Gilbert Neiger +2 more 2023-04-18
11436161 System for address mapping and translation protection Ravi L. Sahita, Gilbert Neiger, Vedvyas Shanbhogue, David M. Durham, Andrew V. Anderson +7 more 2022-09-06
11354213 Utilization metrics for processing engines Hisham Abu Salah, Arthur Leonard Brown, Russell J. Fenger, Deepak Samuel Kirubakaran, Jun Pan +5 more 2022-06-07
11023233 Methods, apparatus, and instructions for user level thread suspension Michael Mishaeli, Jason W. Brandt, Gilbert Neiger, Rajesh M. Sankaran, Raghunandan Makaram +3 more 2021-06-01
11019061 Protecting supervisor mode information Barry E. Huntley, Gilbert Neiger, H. Peter Anvin, Adriaan Van De Ven, Scott Dion Rodgers 2021-05-25
10999284 Protecting supervisor mode information Barry E. Huntley, Gilbert Neiger, H. Peter Anvin, Adriaan Van De Ven, Scott Dion Rodgers 2021-05-04
10515023 System for address mapping and translation protection Ravi L. Sahita, Gilbert Neiger, Vedvyas Shanbhogue, David M. Durham, Andrew V. Anderson +7 more 2019-12-24
10503664 Virtual machine manager for address mapping and translation protection David M. Durham, Ravi L. Sahita, Gilbert Neiger, Vedvyas Shanbhogue, Andrew V. Anderson +7 more 2019-12-10
10324862 Supporting oversubscription of guest enclave memory pages Rebekah M. Leslie-Hurd, Francis X. McKeen, Carlos V. Rozas, Gilbert Neiger, Ittai Anati +3 more 2019-06-18
10263988 Protected container key management processors, methods, systems, and instructions Mona Vij, Somnath Chakrabarti, Carlos V. Rozas 2019-04-16
10135825 Protecting supervisor mode information Barry E. Huntley, Gilbert Neiger, H. Peter Anvin, Adriaan Van De Ven, Scott Dion Rodgers 2018-11-20
10120805 Managing memory for secure enclaves Rebekah M. Leslie-Hurd, Francis X. McKeen, Carlos V. Rozas, Gilbert Neiger, Ittai Anati +3 more 2018-11-06
10048881 Restricted address translation to protect against device-TLB vulnerabilities Rajesh M. Sankaran, Prashant Sethi, David Woodhouse, Rupin H. Vakharwala 2018-08-14
9977743 Managing enclave memory pages Rebekah M. Leslie-Hurd, Francis X. McKeen, Carlos V. Rozas, Somnath Chakrabarti 2018-05-22
9916257 Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory Rajesh M. Sankaran, Altug Koker, Philip R. Lantz, James B. Crossland, Aditya Navale +2 more 2018-03-13
9898330 Compacted context state management Atul Khare, Leena K. Puthiyedath, Jim Coke, Michael Mishaeli, Gilbert Neiger +2 more 2018-02-20
9785463 Using per task time slice information to improve dynamic performance state selection Adriaan Van De Ven, A. Leonard Brown 2017-10-10
9747123 Technologies for multi-level virtualization Jun Nakajima, Harshawardhan Vipat, Madhukar Tallam, Manohar R. Castelino 2017-08-29
9600283 Single instruction for specifying a subset of registers to save prior to entering low-power mode, and for specifying a pointer to a function executed after exiting low-power mode Ethan Schuchman, Hong Wang, Chris Weaver, Belliappa Kuttanna, Vivek K. De +1 more 2017-03-21