Issued Patents All Time
Showing 25 most recent of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10503517 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2019-12-10 |
| 10049212 | Protection against return oriented programming attacks | — | 2018-08-14 |
| 9946875 | Detection of return oriented programming attacks | Kevin C. Gotze, Yuriy Bulygin, Kirk D. Brannock | 2018-04-17 |
| 9874925 | Method and apparatus for a zero voltage processor sleep state | Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Alon Naveh +1 more | 2018-01-23 |
| 9870044 | Method and apparatus for a zero voltage processor sleep state | Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Alon Naveh +1 more | 2018-01-16 |
| 9841807 | Method and apparatus for a zero voltage processor sleep state | Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Alon Naveh +1 more | 2017-12-12 |
| 9727345 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2017-08-08 |
| 9612835 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Subramaniam Maiyuran, Shekoufeh Qawami | 2017-04-04 |
| 9582663 | Detection of return oriented programming attacks | Kevin C. Gotze, Yuriy Bulygin, Kirk D. Brannock | 2017-02-28 |
| 9544139 | Method and apparatus for a non-deterministic random bit generator (NRBG) | George W. Cox, David Johnston, Martin G. Dixon, Jason W. Brandt | 2017-01-10 |
| 9383998 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Subramaniam Maiyuran, Shekoufeh Qawami | 2016-07-05 |
| 9342310 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Subramaniam Maiyuran, Shekoufeh Oawami | 2016-05-17 |
| 9251348 | Detection of return oriented programming attacks | Kevin C. Gotze, Yuriy Bulygin, Kirk D. Brannock | 2016-02-02 |
| 9235258 | Method and apparatus for a zero voltage processor | Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Alon Naveh +1 more | 2016-01-12 |
| 9223390 | Method and apparatus for a zero voltage processor | Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Alon Naveh +1 more | 2015-12-29 |
| 9223979 | Detection of return oriented programming attacks | Kevin C. Gotze, Yuriy Bulygin, Kirk D. Brannock | 2015-12-29 |
| 9223389 | Method and apparatus for a zero voltage processor | Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Alon Naveh +1 more | 2015-12-29 |
| 9177148 | Protection against return oriented programming attacks | — | 2015-11-03 |
| 9177147 | Protection against return oriented programming attacks | — | 2015-11-03 |
| 9141180 | Method and apparatus for a zero voltage processor sleep state | Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Alon Naveh +1 more | 2015-09-22 |
| 9098268 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Subramaniam Maiyuran, Shekoufeh Qawami | 2015-08-04 |
| 8959314 | MFENCE and LFENCE micro-architectural implementation method and system | Salvador Palanca, Subramaniam Maiyuran, Shekoufeh Qawami | 2015-02-17 |
| 8892861 | Method and apparatus for establishing safe processor operating points | Varghese George, Sanjeev Jahagirdar, Stephen H. Gunther | 2014-11-18 |
| 8850178 | Method and apparatus for establishing safe processor operating points | Varghese George, Sanjeev Jahagirdar, Stephen H. Gunther | 2014-09-30 |
| 8707062 | Method and apparatus for powered off processor core mode | Sanjeev Jahagirdar, Varghese George, John B. Conrad, Robert Milstrey, Alon Naveh +1 more | 2014-04-22 |