Issued Patents All Time
Showing 25 most recent of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12366910 | Multi-level loops for computer processor control | Doron Rajwan, Efraim Rotem, Avinash N. Ananthakrishnan, Dorit Shapira | 2025-07-22 |
| 12360586 | Processor having accelerated user responsiveness in constrained environment | Efraim Rotem, Doron Rajwan, Nir Rosenzweig, Eric Distefano, Ishmael F. Santos +1 more | 2025-07-15 |
| 12265440 | System, apparatus and method for loose lock-step redundancy power management | Efraim Rotem, Doron Rajwan, Nir Rosenzweig, Yoni Aizik | 2025-04-01 |
| 12008398 | Performance monitoring in heterogeneous systems | Ahmad Yasin, Julius Mandelblat, Rajshree Chabukswar, Michael W. Chynoweth | 2024-06-11 |
| 11966742 | Apparatuses, methods, and systems for instructions to request a history reset of a processor core | Mark J. Charney, Michael Mishaeli, Robert Valentine, Itai Ravid, Jason W. Brandt +3 more | 2024-04-23 |
| 11899599 | Apparatuses, methods, and systems for hardware control of processor performance levels | Efraim Rotem, Doron Rajwan, Hisham Abu Salah, Ariel Gur, Guy M. Therien +1 more | 2024-02-13 |
| 11886918 | Apparatus and method for dynamic control of microprocessor configuration | Ankush Varma, Nikhil Gupta, Vasudevan Srinivasan, Krishnakanth V. Sistla, Nilanjan PALIT +2 more | 2024-01-30 |
| 11815979 | Application priority based power management for a computer device | Efraim Rotem, Doron Rajwan, Yoni Aizik, Esfir Natanzon, Nir Rosenzweig +2 more | 2023-11-14 |
| 11740682 | System, apparatus and method for loose lock-step redundancy power management | Efraim Rotem, Doron Rajwan, Nir Rosenzweig, Yoni Aizik | 2023-08-29 |
| 11734079 | Methods of hardware and software-coordinated opt-in to advanced features on hetero ISA platforms | Toby Opferman, Robert Valentine, Russell C. Arnold | 2023-08-22 |
| 11687139 | Multi-level CPU high current protection | Efraim Rotem, Nir Rosenzweig, Doron Rajwan, Alon Naveh | 2023-06-27 |
| 11645080 | Apparatuses, methods, and systems for instructions to request a history reset of a processor core | Mark J. Charney, Michael Mishaeli, Robert Valentine, Itai Ravid, Jason W. Brandt +3 more | 2023-05-09 |
| 11543878 | Power control arbitration | Efraim Rotem, Eric J. Dehaemer, Alexander Gendler, Nadav Shulman, Krishnakanth V. Sistla +10 more | 2023-01-03 |
| 11531563 | Technology for optimizing hybrid processor utilization | Monica Gupta, Hisham Abu Salah, Rajshree Chabukswar, Russell J. Fenger, Eugene Gorbatov +5 more | 2022-12-20 |
| 11481013 | Multi-level loops for computer processor control | Doron Rajwan, Efraim Rotem, Avinash N. Ananthakrishnan, Dorit Shapira | 2022-10-25 |
| 11436118 | Apparatus and method for adaptively scheduling work on heterogeneous processing resources | Omer Barak, Rajshree Chabukswar, Russell J. Fenger, Eugene Gorbatov, Monica Gupta +4 more | 2022-09-06 |
| 11436018 | Apparatuses, methods, and systems for instructions to request a history reset of a processor core | Mark J. Charney, Michael Mishaeli, Robert Valentine, Itai Ravid, Jason W. Brandt +3 more | 2022-09-06 |
| 11435816 | Processor having accelerated user responsiveness in constrained environment | Efraim Rotem, Doron Rajwan, Nir Rosenzweig, Eric Distefano, Ishmael F. Santos +1 more | 2022-09-06 |
| 11422849 | Technology for dynamically grouping threads for energy efficiency | Deepak Samuel Kirubakaran, Vijay Dhanraj, Russell J. Fenger, Hisham Abu-Salah | 2022-08-23 |
| 11409572 | Methods of hardware and software coordinated opt-in to advanced features on hetero ISA platforms | Toby Opferman, Robert Valentine, Russell C. Arnold | 2022-08-09 |
| 11402891 | System, apparatus and method for loose lock-step redundancy power management | Efraim Rotem, Doron Rajwan, Nir Rosenzweig, Yoni Aizik | 2022-08-02 |
| 11354213 | Utilization metrics for processing engines | Hisham Abu Salah, Arthur Leonard Brown, Russell J. Fenger, Deepak Samuel Kirubakaran, Asit K. Mallick +5 more | 2022-06-07 |
| 11340687 | System, apparatus and method for responsive autonomous hardware performance state control of a processor | Hisham Abu Salah, Efraim Rotem, Yoni Aizik, Daniel D. Lederman | 2022-05-24 |
| 11307628 | Multi-level CPU high current protection | Efraim Rotem, Nir Rosenzweig, Doron Rajwan, Alon Naveh | 2022-04-19 |
| 11301298 | Apparatus and method for dynamic control of microprocessor configuration | Ankush Varma, Nikhil Gupta, Vasudevan Srinivasan, Krishnakanth V. Sistla, Nilanjan PALIT +2 more | 2022-04-12 |