Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393427 | Core-based speculative page fault list | Michael W. Chynoweth, Rajshree Chabukswar, Vijay Bahirji | 2025-08-19 |
| 12165686 | Memory power management method and apparatus | Nivedha Krishnakumar, Virendra Vikramsinh Adsure, Jaya L. Jeyaseelan, Nadav Bonen, Barnes Cooper +2 more | 2024-12-10 |
| 11989129 | Multiple virtual NUMA domains within a single NUMA domain via operating system interface tables | Kyle Delehanty, Sridharan Sakthivelu, Janardhana Yoga Narasimhaswamy, Vijay Bahirji | 2024-05-21 |
| 11957974 | System architecture for cloud gaming | Makarand Dharmapurikar, Rajabali M. Koduri, Vijay Bahirji, Scott G. Christian, Rajeev Varma Penmatsa +1 more | 2024-04-16 |
| 11734079 | Methods of hardware and software-coordinated opt-in to advanced features on hetero ISA platforms | Eliezer Weissmann, Robert Valentine, Russell C. Arnold | 2023-08-22 |
| 11507368 | Spoofing a processor identification instruction | Russell C. Arnold, Vedvyas Shanbhogue | 2022-11-22 |
| 11461098 | Apparatuses, methods, and systems for instructions for operating system transparent instruction state management of new instructions for application threads | Prashant Sethi, Abhimanyu Kanaiya Varde, Barry E. Huntley, Michael W. Chynoweth, Jason W. Brandt | 2022-10-04 |
| 11409572 | Methods of hardware and software coordinated opt-in to advanced features on hetero ISA platforms | Eliezer Weissmann, Robert Valentine, Russell C. Arnold | 2022-08-09 |
| 11055094 | Heterogeneous CPUID spoofing for remote processors | Russell C. Arnold, Vedvyas Shanbhogue, Michael W. Chynoweth | 2021-07-06 |
| 10949207 | Processor core supporting a heterogeneous system instruction set architecture | Russell C. Arnold, Vedvyas Shanbhogue | 2021-03-16 |
| 10877751 | Spoofing a processor identification instruction | Russell C. Arnold, Vedvyas Shanbhogue | 2020-12-29 |
| 10733108 | Physical page tracking for handling overcommitted memory | Vijay Bahirji, Amin Firoozshahian, Mahesh Madhav, Omid Azizi | 2020-08-04 |
| 10346167 | Apparatuses and methods for generating a suppressed address trace | James B. Crossland, Jason W. Brandt, Beeman C. Strong | 2019-07-09 |
| 10001953 | System for configuring partitions within non-volatile random access memory (NVRAM) as a replacement for traditional mass storage | Leena K. Puthiyedath, Blaise Fanning, James B. Crossland | 2018-06-19 |
| 9852069 | RAM disk using non-volatile random access memory | James B. Crossland, Blaise Fanning | 2017-12-26 |
| 9535827 | RAM disk using non-volatile random access memory | James B. Crossland, Blaise Fanning | 2017-01-03 |
| 9529708 | Apparatus for configuring partitions within phase change memory of tablet computer with integrated memory controller emulating mass storage to storage driver based on request from software | Leena K. Puthiyedath, Blaise Fanning, James B. Crossland | 2016-12-27 |
| 9524227 | Apparatuses and methods for generating a suppressed address trace | James B. Crossland, Jason W. Brandt, Beeman C. Strong | 2016-12-20 |
| 9239801 | Systems and methods for preventing unauthorized stack pivoting | Baiju V. Patel, Xiaoning Li, H P. ANVIN, Asit K. Mallick, Gilbert Neiger +5 more | 2016-01-19 |
| 9207940 | Robust and high performance instructions for system call | Baiju V. Patel, James B. Crossland, Atul Khare | 2015-12-08 |
| 8677022 | Method and apparatus for updating a graphical display in a distributed processing environment using compression | Justin Bullard | 2014-03-18 |
| 8423673 | Method and apparatus for updating a graphical display in a distributed processing environment using compression | Justin Bullard | 2013-04-16 |
| 8171169 | Method and apparatus for updating a graphical display in a distributed processing environment | Justin Bullard, David J. Kasik | 2012-05-01 |