| 12455612 |
Device, method and system to provide thread scheduling hints to a software process |
Vadim Bassin, Eliezer Weissmann, Efraim Rotem |
2025-10-28 |
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| 12393430 |
Methods and apparatus to increase boot performance by categorizing boot tasks |
Subrata Banik, Rajaram Regupathy, Vincent J. Zimmer |
2025-08-19 |
|
| 12198186 |
Systems, apparatuses, and methods for resource bandwidth enforcement |
Andrew J. Herdrich, Edwin Verplanke, Ravishankar Iyer, Christopher C. Gianos, Jeffrey D. Chamberlain +2 more |
2025-01-14 |
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| 12189479 |
Apparatus and method for detecting and recovering from data fetch errors |
Theodros Yigzaw, Geeyarpuram N. Santhanakrishnan, Ganapati Srinivasa, Jose A. Vargas, Hisham Shafi +5 more |
2025-01-07 |
|
| 12008398 |
Performance monitoring in heterogeneous systems |
Ahmad Yasin, Eliezer Weissmann, Rajshree Chabukswar, Michael W. Chynoweth |
2024-06-11 |
$21,221,000 |
| 11436118 |
Apparatus and method for adaptively scheduling work on heterogeneous processing resources |
Eliezer Weissmann, Omer Barak, Rajshree Chabukswar, Russell J. Fenger, Eugene Gorbatov +4 more |
2022-09-06 |
$12,766,000 |
| 11048587 |
Apparatus and method for detecting and recovering from data fetch errors |
Theodros Yigzaw, Geeyarpuram N. Santhanakrishnan, Ganapati Srinivasa, Jose A. Vargas, Hisham Shafi +5 more |
2021-06-29 |
$34,663,000 |
| 10936490 |
System and method for per-agent control and quality of service of shared resources in chip multiprocessor platforms |
Andrew J. Herdrich, Edwin Verplanke, Stephen R. Van Doren, Ravishankar Iyer, Eric R. Wehage +6 more |
2021-03-02 |
$34,569,000 |
| 10915453 |
Multi level system memory having different caching structures and memory controller that supports concurrent look-up into the different caching structures |
Israel Diamand, Zvika Greenfield, Asaf Rubinstein |
2021-02-09 |
$44,388,000 |
| 10877693 |
Architecture for dynamic transformation of memory configuration |
Nadav Bonen, Nir Sucher |
2020-12-29 |
$24,597,000 |
| 10223204 |
Apparatus and method for detecting and recovering from data fetch errors |
Theodros Yigzaw, Geeyarpuram N. Santhanakrishnan, Ganapati Srinivasa, Jose A. Vargas, Hisham Shafi +5 more |
2019-03-05 |
$19,977,000 |
| 10175992 |
Systems and methods for enhancing BIOS performance by alleviating code-size limitations |
Leon Polishuk, Pavel Konev, Larisa Novakovsky |
2019-01-08 |
$28,117,000 |
| 10153784 |
Use of error correcting code to carry additional data bits |
Daniel Greenspan, Asaf Rubinstein |
2018-12-11 |
$24,515,000 |
| 10089229 |
Cache allocation with code and data prioritization |
Andrew J. Herdrich, Edwin Verplanke, Ravishankar Iyer, Christopher C. Gianos, Jeffrey D. Chamberlain +2 more |
2018-10-02 |
$23,827,000 |
| 9990287 |
Apparatus and method for memory-hierarchy aware producer-consumer instruction |
Shlomo Raikin, Raanan Sade, Robert Valentine, Ron Shalev, Larisa Novakovsky |
2018-06-05 |
$24,427,000 |
| 9734079 |
Hybrid exclusive multi-level memory architecture with memory management |
Dannie Gerrit Feekes, Shlomo Raikin, Blaise Fanning, Joydeep Ray, Ariel Berkovits +3 more |
2017-08-15 |
$8,272,000 |
| 9563564 |
Cache allocation with code and data prioritization |
Andrew J. Herdrich, Edwin Verplanke, Ravishankar Iyer, Christopher C. Gianos, Jeffrey D. Chamberlain +2 more |
2017-02-07 |
$9,424,000 |
| 9559726 |
Use of error correcting code to carry additional data bits |
Daniel Greenspan, Asaf Rubinstein |
2017-01-31 |
$9,360,000 |
| 9471088 |
Restricting clock signal delivery in a processor |
Alexander Gendler, Efraim Rotem, Alexander Lyakhov, Larisa Novakovsky, George Leifman +3 more |
2016-10-18 |
$9,528,000 |
| 9448879 |
Apparatus and method for implement a multi-level memory hierarchy |
Theodros Yigzaw, Oded Lempel, Hisham Shafi, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas +6 more |
2016-09-20 |
$10,814,000 |
| 9418013 |
Selective prefetching for a sectored cache |
Aravindh Anantaraman, Zvika Greenfield, Anant Vithal Nori |
2016-08-16 |
$10,311,000 |
| 8458539 |
G-ODLAT on-die logic analyzer trigger with parallel vector finite state machine |
Tsvika Kurts, Daniel Skaba, Michael Israeli, Itai Samoelov |
2013-06-04 |
$16,514,000 |
| 8347035 |
Posting weakly ordered transactions |
Geeyarpuram N. Santhanakrishnan, Ehud Cohen, Larisa Novakovsky, Zeev Offen, Michelle J. Moravan +2 more |
2013-01-01 |
|
| 8015365 |
Reducing back invalidation transactions from a snoop filter |
Tsvika Kurts, Kai Cheng, Jeffrey D. Gilbert |
2011-09-06 |
$20,814,000 |
| 7958510 |
Device, system and method of managing a resource request |
Abraham Mendelson, Larisa Novakovsky |
2011-06-07 |
$16,749,000 |
