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Payload cache |
Ilan Pardo, Mark Rosenbluth, Idan Burstein, Rui Xu, Tsofia Eshel |
2022-02-22 |
| 9448879 |
Apparatus and method for implement a multi-level memory hierarchy |
Theodros Yigzaw, Hisham Shafi, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas, Ganapati Srinivasa +6 more |
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Method and apparatus for inclusion of TLB entries in a micro-op cache of a processor |
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Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor |
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Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor |
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2012-02-28 |
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System and method for soft error handling |
Ittai Anati, Zeev Offen |
2007-10-30 |
| 7174444 |
Preventing a read of a next sequential chunk in branch prediction of a subject chunk |
Eran Altshuler, Robert Valentine, Nicolas Kacevas |
2007-02-06 |
| 6646647 |
Display of images from tiled memory |
Roman Surgutchik, Gad S Shaeffer, Robert Valentine |
2003-11-11 |
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Method and apparatus for branch trace message scheme |
Tsvika Kurts, Roman Surgutchik, Ittai Anati, Haim Lustig |
2003-11-11 |
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Method and system for branch target prediction using path information |
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2003-07-29 |
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Managing prefetching from a data buffer |
Gad Sheaffer, Roman Surgutchik |
2003-02-04 |
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Method and apparatus for fast unsigned integral division |
Michael A. Julier, Thomas M. Johnson |
2000-06-27 |
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Method and apparatus for identifying potential entry points into trace segments |
Guy Peled, Robert Valentine |
2000-06-13 |
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Method and apparatus for caching trace segments with multiple entry points |
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2000-06-06 |
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System for speculative branch target prediction having a dynamic prediction history buffer and a static prediction history buffer |
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1999-11-02 |