OL

Oded Lempel

IN Intel: 14 patents #2,910 of 30,777Top 10%
NV NVIDIA: 1 patents #4,316 of 7,811Top 60%
Overall (All Time): #316,294 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11258887 Payload cache Ilan Pardo, Mark Rosenbluth, Idan Burstein, Rui Xu, Tsofia Eshel 2022-02-22
9448879 Apparatus and method for implement a multi-level memory hierarchy Theodros Yigzaw, Hisham Shafi, Geeyarpuram N. Santhanakrishnan, Jose A. Vargas, Ganapati Srinivasa +6 more 2016-09-20
8782374 Method and apparatus for inclusion of TLB entries in a micro-op cache of a processor Lihu Rappoport, Chen Koren, Franck Sala, Ido Ouziel, Ron Gabor +2 more 2014-07-15
8433850 Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor Lihu Rappoport, Chen Koren, Franck Sala, Ilhyun Kim, Lior Libis +1 more 2013-04-30
8127085 Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor Lihu Rappoport, Chen Koren, Franck Sala, Ido Ouziel, Ilhyun Kim +3 more 2012-02-28
7290179 System and method for soft error handling Ittai Anati, Zeev Offen 2007-10-30
7174444 Preventing a read of a next sequential chunk in branch prediction of a subject chunk Eran Altshuler, Robert Valentine, Nicolas Kacevas 2007-02-06
6646647 Display of images from tiled memory Roman Surgutchik, Gad S Shaeffer, Robert Valentine 2003-11-11
6647545 Method and apparatus for branch trace message scheme Tsvika Kurts, Roman Surgutchik, Ittai Anati, Haim Lustig 2003-11-11
6601161 Method and system for branch target prediction using path information Lihu Rappoport, Ronny Ronen, Nicolas Kacevas 2003-07-29
6515672 Managing prefetching from a data buffer Gad Sheaffer, Roman Surgutchik 2003-02-04
6081824 Method and apparatus for fast unsigned integral division Michael A. Julier, Thomas M. Johnson 2000-06-27
6076144 Method and apparatus for identifying potential entry points into trace segments Guy Peled, Robert Valentine 2000-06-13
6073213 Method and apparatus for caching trace segments with multiple entry points Guy Peled, Robert Valentine 2000-06-06
5978909 System for speculative branch target prediction having a dynamic prediction history buffer and a static prediction history buffer 1999-11-02