Issued Patents All Time
Showing 25 most recent of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11275637 | Aggregated page fault signaling and handling | Boris Ginzburg, Ilya Osadchiy | 2022-03-15 |
| 11243768 | Mechanism for saving and retrieving micro-architecture context | Efraim Rotem, Eliezer Weissmann, Boris Ginzburg, Alon Naveh, Nadav Shulman | 2022-02-08 |
| 10558490 | Mechanism for issuing requests to an accelerator from multiple threads | Boris Ginzburg, Eliezer Weissmann | 2020-02-11 |
| 10467012 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg | 2019-11-05 |
| 10255126 | Aggregated page fault signaling and handling | Boris Ginzburg, Ilya Osadchiy | 2019-04-09 |
| 10191742 | Mechanism for saving and retrieving micro-architecture context | Efraim Rotem, Eliezer Weissmann, Boris Ginzburg, Alon Naveh, Nadav Shulman | 2019-01-29 |
| 10185566 | Migrating tasks between asymmetric computing elements of a multi-core processor | Alon Naveh, Yuval Yosef, Eliezer Weissmann, Anil Aggarwal, Efraim Rotem +7 more | 2019-01-22 |
| 10120691 | Context switching mechanism for a processor having a general purpose core and a tightly coupled accelerator | Boris Ginzburg, Eliezer Weissmann, Karthikeyan Vaithianathan, Ehud Cohen | 2018-11-06 |
| 10078519 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg | 2018-09-18 |
| 9971688 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg | 2018-05-15 |
| 9891980 | Aggregated page fault signaling and handline | Boris Ginzburg, Ilya Osadchiy | 2018-02-13 |
| 9747221 | Dynamic pinning of virtual pages shared between different type processors of a heterogeneous computing platform | Gad Sheaffer, Boris Ginzburg, Eliezer Weissmann | 2017-08-29 |
| 9720730 | Providing an asymmetric multicore processor system transparently to an operating system | Boris Ginzburg, Ilya Osadchiy, Eliezer Weissmann, Michael Mishaeli, Alon Naveh +13 more | 2017-08-01 |
| 9405701 | Apparatus and method for accelerating operations in a processor which uses shared virtual memory | Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg | 2016-08-02 |
| 9396020 | Context switching mechanism for a processing core having a general purpose CPU core and a tightly coupled accelerator | Boris Ginzburg, Eliezer Weissmann, Karthikeyan Vaithianathan, Ehud Cohen | 2016-07-19 |
| 9348594 | Core switching acceleration in asymmetric multiprocessor system | Koichi Yamada, Boris Ginzburg, Wei Li, Esfir Natanzon, Konstantin Levit-Gurevich +4 more | 2016-05-24 |
| 9164923 | Dynamic pinning of virtual pages shared between different type processors of a heterogeneous computing platform | Gad Sheaffer, Boris Ginzburg, Eliezer Weissmann | 2015-10-20 |
| 9152572 | Translation lookaside buffer for multiple context compute engine | Boris Ginzburg, Eliezer Weissmann, Karthikeyan Vaithianathan | 2015-10-06 |
| 9053022 | Synchronous software interface for an accelerated compute engine | Boris Ginzburg, Eliezer Weissmann | 2015-06-09 |
| 8943298 | Meta predictor restoration upon detecting misprediction | Stephan Jourdan, Adi Yoaz, Mattan Erez | 2015-01-27 |
| 8874882 | Compiler-directed sign/zero extension of a first bit size result to overwrite incorrect data before subsequent processing involving the result within an architecture supporting larger second bit size values | Alexander Peleg | 2014-10-28 |
| 8572358 | Meta predictor restoration upon detecting misprediction | Mattan Erez, Stephan Jourdan, Adi Yoaz | 2013-10-29 |
| 8402290 | Power management for multiple processor cores | Lev Finkelstein, Efraim Rotem, Aviad Cohen, Doron Rajwan | 2013-03-19 |
| 8285976 | Method and apparatus for predicting branches using a meta predictor | Stephan Jourdan, Adi Yoaz, Mattan Erez | 2012-10-09 |
| 8245070 | Method for optimizing voltage-frequency setup in multi-core processor systems | Lev Finkelstein, Yossi Abulafia, Aviad Cohen, Doron Rajwan, Efraim Rotem | 2012-08-14 |