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USPTO Patent Rankings Data through Dec 31, 2025
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Ronny Ronen — 86 Patents

Intel: 82 patents #293 of 30,777Top 1%
Micron: 3 patents #3,646 of 6,374Top 60%
S(Sae Magnetics (H.K.): 1 patents #306 of 585Top 55%
Haifa, IL: #13 of 3,849 inventorsTop 1%
Overall (All Time): #19,585 of 4,157,543Top 1%
86 Patents All Time
Ronny Ronen has been granted 86 US patents while listed as an inventor at Intel. The first was granted in 1997 and the most recent in March 2022. Ronny Ronen ranks #19,585 of 4,157,543 US inventors in our database (top 0.47%). Patent records list Ronny Ronen in Haifa, IL.

Issued Patents All Time

Showing 1–25 of 86 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11275637 Aggregated page fault signaling and handling Boris Ginzburg, Ilya Osadchiy 2022-03-15 $18,336,000
11243768 Mechanism for saving and retrieving micro-architecture context Efraim Rotem, Eliezer Weissmann, Boris Ginzburg, Alon Naveh, Nadav Shulman 2022-02-08 $27,206,000
10558490 Mechanism for issuing requests to an accelerator from multiple threads Boris Ginzburg, Eliezer Weissmann 2020-02-11 $33,267,000
10467012 Apparatus and method for accelerating operations in a processor which uses shared virtual memory Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg 2019-11-05 $22,190,000
10255126 Aggregated page fault signaling and handling Boris Ginzburg, Ilya Osadchiy 2019-04-09 $21,845,000
10191742 Mechanism for saving and retrieving micro-architecture context Efraim Rotem, Eliezer Weissmann, Boris Ginzburg, Alon Naveh, Nadav Shulman 2019-01-29 $23,219,000
10185566 Migrating tasks between asymmetric computing elements of a multi-core processor Alon Naveh, Yuval Yosef, Eliezer Weissmann, Anil Aggarwal, Efraim Rotem +7 more 2019-01-22 $27,645,000
10120691 Context switching mechanism for a processor having a general purpose core and a tightly coupled accelerator Boris Ginzburg, Eliezer Weissmann, Karthikeyan Vaithianathan, Ehud Cohen 2018-11-06 $18,970,000
10078519 Apparatus and method for accelerating operations in a processor which uses shared virtual memory Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg 2018-09-18 $29,867,000
9971688 Apparatus and method for accelerating operations in a processor which uses shared virtual memory Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg 2018-05-15 $21,346,000
9891980 Aggregated page fault signaling and handline Boris Ginzburg, Ilya Osadchiy 2018-02-13 $15,494,000
9747221 Dynamic pinning of virtual pages shared between different type processors of a heterogeneous computing platform Gad Sheaffer, Boris Ginzburg, Eliezer Weissmann 2017-08-29 $8,286,000
9720730 Providing an asymmetric multicore processor system transparently to an operating system Boris Ginzburg, Ilya Osadchiy, Eliezer Weissmann, Michael Mishaeli, Alon Naveh +13 more 2017-08-01 $11,137,000
9405701 Apparatus and method for accelerating operations in a processor which uses shared virtual memory Eliezer Weissmann, Karthikeyan Vaithianathan, Yoav Zach, Boris Ginzburg 2016-08-02 $8,723,000
9396020 Context switching mechanism for a processing core having a general purpose CPU core and a tightly coupled accelerator Boris Ginzburg, Eliezer Weissmann, Karthikeyan Vaithianathan, Ehud Cohen 2016-07-19 $7,217,000
9348594 Core switching acceleration in asymmetric multiprocessor system Koichi Yamada, Boris Ginzburg, Wei Li, Esfir Natanzon, Konstantin Levit-Gurevich +4 more 2016-05-24 $13,693,000
9164923 Dynamic pinning of virtual pages shared between different type processors of a heterogeneous computing platform Gad Sheaffer, Boris Ginzburg, Eliezer Weissmann 2015-10-20 $14,675,000
9152572 Translation lookaside buffer for multiple context compute engine Boris Ginzburg, Eliezer Weissmann, Karthikeyan Vaithianathan 2015-10-06 $14,030,000
9053022 Synchronous software interface for an accelerated compute engine Boris Ginzburg, Eliezer Weissmann 2015-06-09 $16,785,000
8943298 Meta predictor restoration upon detecting misprediction Stephan Jourdan, Adi Yoaz, Mattan Erez 2015-01-27 $26,039,000
8874882 Compiler-directed sign/zero extension of a first bit size result to overwrite incorrect data before subsequent processing involving the result within an architecture supporting larger second bit size values Alexander Peleg 2014-10-28 $15,939,000
8572358 Meta predictor restoration upon detecting misprediction Mattan Erez, Stephan Jourdan, Adi Yoaz 2013-10-29 $5,369,000
8402290 Power management for multiple processor cores Lev Finkelstein, Efraim Rotem, Aviad Cohen, Doron Rajwan 2013-03-19 $13,402,000
8285976 Method and apparatus for predicting branches using a meta predictor Stephan Jourdan, Adi Yoaz, Mattan Erez 2012-10-09 $2,419,000
8245070 Method for optimizing voltage-frequency setup in multi-core processor systems Lev Finkelstein, Yossi Abulafia, Aviad Cohen, Doron Rajwan, Efraim Rotem 2012-08-14 $13,822,000