Issued Patents All Time
Showing 26–50 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7934110 | Dynamically managing thermal levels in a processing system | Lev Finkelstein, Aviad Cohen, Efraim Rotem | 2011-04-26 |
| 7802076 | Method and apparatus to vectorize multiple input instructions | Yoav Almog, Roni Rosner | 2010-09-21 |
| 7802077 | Trace indexing via trace end addresses | Stephen Jourdan, Lihu Rappoport, Adi Yoaz | 2010-09-21 |
| 7757065 | Instruction segment recording scheme | Stephan Jourdan, Lihu Rappoport | 2010-07-13 |
| 7689804 | Selectively protecting a register file | Xavier Vera, Jaume Abella, Jose-Alejandro Pineiro, Antonio Gonzalez | 2010-03-30 |
| 7653786 | Power reduction for processor front-end by caching decoded instructions | Baruch Solomon, Doron Orenstien | 2010-01-26 |
| 7644236 | Memory cache bank prediction | Adi Yoaz, Lihu Rappoport, Mattan Erez, Stephan Jourdan, Bob Valentine | 2010-01-05 |
| 7586281 | Methods and apparatus for optimal voltage and frequency control of thermally limited systems | Aviad Cohen, Lev Finkelstein, Avi Mendelson, Dmitry Rudoy | 2009-09-08 |
| 7539850 | Enhanced virtual renaming scheme and deadlock prevention therefor | Stephan Jourdan, Michael Bekerman | 2009-05-26 |
| 7464278 | Combining power prediction and optimal control approaches for performance optimization in thermally limited designs | Aviad Cohen, Adam De La Zerda, Lev Finkelstein, Dmitry Rudoy | 2008-12-09 |
| 7458069 | System and method for fusing instructions | Alexander Peleg, Nathaniel Hoffman | 2008-11-25 |
| 7437581 | Method and apparatus for varying energy per instruction according to the amount of available parallelism | Edward T. Grochowski, John Shen, Hong Wang, Doron Orenstein, Gad Sheaffer +1 more | 2008-10-14 |
| 7428627 | Method and apparatus for predicting values in a processor having a plurality of prediction modes | Stephan Jourdan, Michael Bekerman, Lihu Rappoport | 2008-09-23 |
| 7284116 | Method and system for safe data dependency collapsing based on control-flow speculation | Stephan Jourdan, Freddy Gabbay, Adi Yoaz | 2007-10-16 |
| 7260684 | Trace cache filtering | Abraham Mendelson, Roni Rosner | 2007-08-21 |
| 7171543 | Method and apparatus for executing a 32-bit application by confining the application to a 32-bit address space subset in a 64-bit processor | Alexander Peleg | 2007-01-30 |
| 7159133 | Low-power processor hint, such as from a pause instruction | Doron Orenstien | 2007-01-02 |
| 7155599 | Method and apparatus for a register renaming structure | Stephan Jourdan, Michael Bekerman | 2006-12-26 |
| 7141953 | Methods and apparatus for optimal voltage and frequency control of thermally limited systems | Aviad Cohen, Lev Finkelstein, Avi Mendelson, Dmitry Rudoy | 2006-11-28 |
| 7130966 | Power reduction for processor front-end by caching decoded instructions | Baruch Solomon, Doron Orenstien | 2006-10-31 |
| 7096145 | Deterministic power-estimation for thermal control | Doron Orenstien | 2006-08-22 |
| 7062607 | Filtering basic instruction segments in a processor front-end for power conservation | Baruch Solomon | 2006-06-13 |
| 7062638 | Prediction of issued silent store operations for allowing subsequently issued loads to bypass unexecuted silent stores and confirming the bypass upon execution of the stores | Adi Yoaz, Rajesh Patel | 2006-06-13 |
| 7043405 | Distribution of processing activity in a multiple core microprocessor | Doron Orenstien | 2006-05-09 |
| 7024542 | System and method of reducing the number of copies from alias registers to real registers in the commitment of instructions | Guillermo Savransky, Antonio Gonzalez | 2006-04-04 |