| 10120684 |
Instructions and logic to perform mask load and store operations as sequential or one-at-a-time operations after exceptions and for un-cacheable type memory |
Zeev Sperber, Robert Valentine, Benny Eitan |
2018-11-06 |
| 9529592 |
Vector mask memory access instructions to perform individual and sequential memory access operations if an exception occurs during a full width memory access operation |
Zeev Sperber, Bob Valentine, Benny Eitan |
2016-12-27 |
| 8909901 |
Permute operations with flexible zero control |
Cristina S. Anderson, Mark Buxton, Bob Valentine |
2014-12-09 |
| 8694758 |
Mixing instructions with different register sizes |
Zeev Sperber, Robert Valentine, Benny Eitan |
2014-04-08 |
| 8504802 |
Compressed instruction format |
Robert Valentine, Bret L. Toll |
2013-08-06 |
| 8386547 |
Instruction and logic for performing range detection |
Asaf Hargil, Evgeny Fiksman, Artiom Myaskouvskey |
2013-02-26 |
| 7882325 |
Method and apparatus for a double width load using a single width load port |
Zeev Sperber, Robert Valentine, Ehud Cohen, Benny Eitan |
2011-02-01 |
| 7653786 |
Power reduction for processor front-end by caching decoded instructions |
Baruch Solomon, Ronny Ronen |
2010-01-26 |
| 7613908 |
Selective hardware lock disabling |
Shlomo Raikin, Gad Sheaffer |
2009-11-03 |
| 7216240 |
Apparatus and method for address bus power control |
Tsvika Kurts, Marcelo Yuffe |
2007-05-08 |
| 7159133 |
Low-power processor hint, such as from a pause instruction |
Ronny Ronen |
2007-01-02 |
| 7152167 |
Apparatus and method for data bus power control |
Tsvika Kurts, Marcelo Yuffe |
2006-12-19 |
| 7130966 |
Power reduction for processor front-end by caching decoded instructions |
Baruch Solomon, Ronny Ronen |
2006-10-31 |
| 7114038 |
Method and apparatus for communicating between integrated circuits in a low power mode |
Marcelo Yuffe |
2006-09-26 |
| 7096145 |
Deterministic power-estimation for thermal control |
Ronny Ronen |
2006-08-22 |
| 7043405 |
Distribution of processing activity in a multiple core microprocessor |
Ronny Ronen |
2006-05-09 |
| 6950903 |
Power reduction for processor front-end by caching decoded instructions |
Baruch Solomon, Ronny Ronen |
2005-09-27 |
| 6804632 |
Distribution of processing activity across processing hardware based on power consumption considerations |
Ronny Ronen |
2004-10-12 |
| 6687838 |
Low-power processor hint, such as from a PAUSE instruction |
Ronny Ronen |
2004-02-03 |