Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10929143 | Method and apparatus for efficient matrix alignment in a systolic array | Mike Espig, Bret L. Toll, Raanan Sade, Alexander Heinecke, Christopher J. Hughes | 2021-02-23 |
| 9529592 | Vector mask memory access instructions to perform individual and sequential memory access operations if an exception occurs during a full width memory access operation | Doron Orenstien, Zeev Sperber, Benny Eitan | 2016-12-27 |
| 8909901 | Permute operations with flexible zero control | Cristina S. Anderson, Mark Buxton, Doron Orenstien | 2014-12-09 |
| 8103831 | Efficient method and apparatus for employing a micro-op cache in a processor | Lihu Rappoport, Stephan Jourdan, Yoav Almog, Franck Sala, Amir Leibovitz +2 more | 2012-01-24 |
| 7644236 | Memory cache bank prediction | Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan | 2010-01-05 |
| 7363476 | Method and apparatus to support an expanded register set | Opher Kahn, Alexander Peleg | 2008-04-22 |
| 6880063 | Memory cache bank prediction | Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan | 2005-04-12 |
| 6694421 | Cache memory bank access prediction | Adi Yoaz, Ronny Ronen, Lihu Rappoport, Mattan Erez, Stephan Jourdan | 2004-02-17 |
| 6625724 | Method and apparatus to support an expanded register set | Opher Kahn, Alexander Peleg | 2003-09-23 |