| 12463920 |
Segment to segment network interface |
Sergio Kolor, Lior Zimet, Eran Tamari, Tzach Zemer, Per Hammarlund |
2025-11-04 |
|
| 12401605 |
Communication fabric structures for increased bandwidth |
Sergio Kolor, Dan Darel, Lior Zimet, Lital Levy-Rubin, Roi Uziel +3 more |
2025-08-26 |
|
| 10204051 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker |
2019-02-12 |
$25,597,000 |
| 10078590 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker |
2018-09-18 |
$29,867,000 |
| 9946650 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker |
2018-04-17 |
$23,996,000 |
| 9665488 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker |
2017-05-30 |
$12,187,000 |
| 9035960 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker |
2015-05-19 |
$24,255,000 |
| 9035962 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker |
2015-05-19 |
$24,255,000 |
| 9035959 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker |
2015-05-19 |
$24,255,000 |
| 8643660 |
Technique to share information among different cache coherency domains |
Zeev Offen, Ariel Berkovits, Thomas A. Piazza, Robert L. Farrell, Altug Koker |
2014-02-04 |
$11,338,000 |
| 7975161 |
Reducing CPU and bus power when running in power-save modes |
— |
2011-07-05 |
$27,745,000 |
| 7418561 |
Adaptive throttling of memory accesses, such as throttling RDRAM accesses in a real-time system |
Erez Birenzwig |
2008-08-26 |
$24,347,000 |
| 7363476 |
Method and apparatus to support an expanded register set |
Alexander Peleg, Bob Valentine |
2008-04-22 |
$13,499,000 |
| 7290161 |
Reducing CPU and bus power when running in power-save modes |
— |
2007-10-30 |
$16,291,000 |
| 6904504 |
Method and apparatus for software selection of protected register settings |
Alon Naveh |
2005-06-07 |
$27,808,000 |
| 6886105 |
Method and apparatus for resuming memory operations from a low latency wake-up low power state |
Doron Orenstein |
2005-04-26 |
$30,166,000 |
| 6842831 |
Low latency buffer control system and method |
Jeffrey R. Wilcox, Alon Naveh |
2005-01-11 |
$22,975,000 |
| 6820169 |
Memory control with lookahead power management |
Jeffrey R. Wilcox |
2004-11-16 |
$29,403,000 |
| 6799241 |
Method for dynamically adjusting a memory page closing policy |
Jeffrey R. Wilcox |
2004-09-28 |
$27,830,000 |
| 6725362 |
Method for encoding an instruction set with a load with conditional fault instruction |
Robert Valentine |
2004-04-20 |
$26,995,000 |
| 6678816 |
Method for optimized representation of page table entries |
Ronny Ronen, Andrew F. Glew, Maury J. Bach, Robert Valentine, Richard Uhlig |
2004-01-13 |
$61,623,000 |
| 6662278 |
Adaptive throttling of memory acceses, such as throttling RDRAM accesses in a real-time system |
Erez Birenzwig |
2003-12-09 |
$40,688,000 |
| 6647482 |
Method for optimized representation of page table entries |
Ronny Ronen, Andrew F. Glew, Maury J. Bach, Robert Valentine, Richard Uhlig |
2003-11-11 |
$43,556,000 |
| 6625724 |
Method and apparatus to support an expanded register set |
Alexander Peleg, Bob Valentine |
2003-09-23 |
$27,638,000 |
| 6593930 |
Method and apparatus to execute a memory maintenance operation during a screen blanking interval |
Gad Sheaffer |
2003-07-15 |
$37,859,000 |
