Issued Patents All Time
Showing 25 most recent of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10410081 | Method and apparatus for a high throughput rasterizer | Subramaniam Maiyuran, Jorge F. Garcia Pabon, Shubh Shah | 2019-09-10 |
| 10297001 | Reduced power implementation of computer instructions | Subramaniam Maiyuran, Shubh Shah, Ashutosh Garg, Jin Xu, Jorge F. Garcia Pabon +1 more | 2019-05-21 |
| 10269154 | Rasterization based on partial spans | Subramaniam Maiyuran, William Sadler, Jorge F. Garcia Pabon | 2019-04-23 |
| 10204051 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Robert L. Farrell, Altug Koker, Opher Kahn | 2019-02-12 |
| 10152764 | Hardware based free lists for multi-rate shader | Prasoonkumar Surti | 2018-12-11 |
| 10078590 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Robert L. Farrell, Altug Koker, Opher Kahn | 2018-09-18 |
| 10037621 | Hierarchical quadrant based coverage testing for rasterization | Prasoonkumar Surti, Abhishek R. Appu | 2018-07-31 |
| 9984430 | Ordering threads as groups in a multi-threaded, multi-core graphics compute system | Prasoonkumar Surti | 2018-05-29 |
| 9983884 | Method and apparatus for SIMD structured branching | Subramaniam Maiyuran, Darin Starkey | 2018-05-29 |
| 9946650 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Robert L. Farrell, Altug Koker, Opher Kahn | 2018-04-17 |
| 9928170 | Scatter/gather capable system coherent cache | Altug Koker, Murali Sundaresan | 2018-03-27 |
| 9824412 | Position-only shading pipeline | Saurabh Sharma, Subramaniam Maiyuran, Kalyan Kumar BHIRAVABHATLA, Peter L. Doyle, Paul A. Johnson +7 more | 2017-11-21 |
| 9741154 | Recording the results of visibility tests at the input geometry object granularity | Bimal Poddar, Peter L. Doyle | 2017-08-22 |
| 9665488 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Robert L. Farrell, Altug Koker, Opher Kahn | 2017-05-30 |
| 9619859 | Techniques for efficient GPU triangle list adjacency detection and handling | Peter L. Doyle | 2017-04-11 |
| 9601092 | Dynamically managing memory footprint for tile based rendering | Michael Apodaca, Bimal Poddar | 2017-03-21 |
| 9471492 | Scatter/gather capable system coherent cache | Altug Koker, Murali Sundaresan | 2016-10-18 |
| 9245324 | Lossy color merge for multi-sampling anti-aliasing compression | Tomas G. Akenine-Moller, Prasoonkumar Surti | 2016-01-26 |
| 9235926 | Techniques for improving MSAA rendering efficiency | Prasoonkumar Surti | 2016-01-12 |
| 9087392 | Techniques for efficient GPU triangle list adjacency detection and handling | Peter L. Doyle | 2015-07-21 |
| 9035962 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Robert L. Farrell, Altug Koker, Opher Kahn | 2015-05-19 |
| 9035960 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Robert L. Farrell, Altug Koker, Opher Kahn | 2015-05-19 |
| 9035959 | Technique to share information among different cache coherency domains | Zeev Offen, Ariel Berkovits, Robert L. Farrell, Altug Koker, Opher Kahn | 2015-05-19 |
| 8914800 | Behavioral model based multi-threaded architecture | Hong Jiang | 2014-12-16 |
| 8902915 | Dataport and methods thereof | Dinakar C. Munagala, Hong Jiang, Bishara Shomar, Val G. Cook, Michael K. Dwyer | 2014-12-02 |