TP

Thomas A. Piazza

IN Intel: 61 patents #466 of 30,777Top 2%
R3 Real 3-D: 4 patents #1 of 17Top 6%
GE: 2 patents #13,562 of 36,430Top 40%
📍 Loomis, CA: #2 of 328 inventorsTop 1%
🗺 California: #4,767 of 386,348 inventorsTop 2%
Overall (All Time): #32,025 of 4,157,543Top 1%
67
Patents All Time

Issued Patents All Time

Showing 26–50 of 67 patents

Patent #TitleCo-InventorsDate
8643660 Technique to share information among different cache coherency domains Zeev Offen, Ariel Berkovits, Robert L. Farrell, Altug Koker, Opher Kahn 2014-02-04
8601177 Dynamic allocation of a buffer across multiple clients in a threaded processor 2013-12-03
8544019 Thread queueing method and apparatus Hong Jiang, Brian D. Rauchfuss, Sreedevi Chalasani, Steven J. Spangler 2013-09-24
8448179 Processing architecture having passive threads and active semaphores Hong Jiang 2013-05-21
8279886 Dataport and methods thereof Dinakar C. Munagala, Hong Jiang, Bishara Shomar, Val G. Cook, Michael K. Dwyer 2012-10-02
8271986 Visual and graphical data processing using a multi-threaded architecture Hong Jiang 2012-09-18
8225012 Dynamic allocation of a buffer across multiple clients in a threaded processor 2012-07-17
8171225 Cache for a multi thread and multi core system and methods thereof Michael K. Dwyer, Scott W. Cheng 2012-05-01
8072451 Efficient Z testing Eric C. Samson, Nasseh Akaaboune, Dinakar C. Munagala 2011-12-06
7975272 Thread queuing method and apparatus Hong Jiang, Brian D. Rauchfuss, Sreedevi Chalasani, Steven J. Spangler 2011-07-05
7904907 Processing architecture having passive threads and active semaphores Hong Jiang 2011-03-08
7719540 Render-cache controller for multithreading, multi-core graphics processor Prasoonkumar Surti 2010-05-18
7614054 Behavioral model based multi-threaded architecture Hong Jiang 2009-11-03
7603544 Dynamic allocation of a buffer across multiple clients in multi-threaded processor without performing a complete flush of data associated with allocation 2009-10-13
7532765 Run length encoded digital image Michael K. Dwyer 2009-05-12
7526124 Match MSB digital image compression Michael K. Dwyer 2009-04-28
7439986 Pixel filtering using shared filter resource between overlay and texture mapping engines David Watson, Kim A. Meinerth, Indraneel Ghosh, Val G. Cook 2008-10-21
7434028 Hardware stack having entries with a data portion and associated counter Michael K. Dwyer, Hong Jiang 2008-10-07
7414632 Multi-pass 4:2:0 subpicture blending Val G. Cook 2008-08-19
7268779 Z-buffering techniques for graphics rendering Eric C. Samson 2007-09-11
7212676 Match MSB digital image compression Michael K. Dwyer 2007-05-01
7158147 Method and apparatus for pixel filtering using shared filter resource between overlay and texture mapping engines David Watson, Kim A. Meinerth, Indraneel Ghosh, Val G. Cook 2007-01-02
7139890 Methods and arrangements to interface memory Douglas R. Moran, Clifford D. Hall, Richard W. Jensen 2006-11-21
7050063 3-D rendering texture caching scheme Michael Mantor, John A. Carey, Ralph C. Taylor, Jeffrey D. Potter, Angel E. Socarras 2006-05-23
7051172 Memory arbiter with intelligent page gathering logic Josh B. Mastronarde, Aditya Sreenivas 2006-05-23