AS

Aditya Sreenivas

IN Intel: 38 patents #927 of 30,777Top 4%
Overall (All Time): #86,683 of 4,157,543Top 3%
38
Patents All Time

Issued Patents All Time

Showing 25 most recent of 38 patents

Patent #TitleCo-InventorsDate
9542336 Isochronous agent data pinning in a multi-level memory system Marc Torrant, David Puffer, Blaise Fanning, Bryan R. White, Joydeep Ray +3 more 2017-01-10
7612780 Optimized memory addressing David E. Freker, Zohar Bogin, Anoop Mukker, Tuong Trieu 2009-11-03
7348986 Image rendering Peter L. Doyle 2008-03-25
7321369 Method and apparatus for synchronizing processing of multiple asynchronous client queues on a graphics controller device David Wyatt 2008-01-22
7230627 Optimized memory addressing David E. Freker, Zohar Bogin, Anoop Mukker, Tuong Trieu 2007-06-12
7173627 Apparatus, method and system with a graphics-rendering engine having a graphics context manager Peter L. Doyle 2007-02-06
7164427 Apparatus, method and system with a graphics-rendering engine having a time allocator Peter L. Doyle 2007-01-16
7120774 Efficient management of memory access requests from a video data stream Todd M. Witter, Kim A. Meinerth 2006-10-10
7103730 Method, system, and apparatus for reducing power consumption of a memory Alankar Saxena 2006-09-05
7051172 Memory arbiter with intelligent page gathering logic Josh B. Mastronarde, Thomas A. Piazza 2006-05-23
7035984 Memory arbiter with grace and ceiling periods and intelligent page gathering logic Josh B. Mastronarde, Thomas A. Piazza 2006-04-25
6999091 Dual memory channel interleaving for graphics and video Alankar Saxena, Tom Piazza 2006-02-14
6995773 Automatic memory management Peter L. Doyle 2006-02-07
6954208 Depth write disable for rendering Peter L. Doyle 2005-10-11
6885374 Apparatus, method and system with a graphics-rendering engine having a time allocator Peter L. Doyle 2005-04-26
6867779 Image rendering Peter L. Doyle 2005-03-15
6792516 Memory arbiter with intelligent page gathering logic Josh B. Mastronarde, Thomas A. Piazza 2004-09-14
6747657 Depth write disable for zone rendering Peter L. Doyle 2004-06-08
6747658 Automatic memory management for zone rendering Peter L. Doyle 2004-06-08
6724389 Multiplexing digital video out on an accelerated graphics port interface Adam H. Wilen, Marcus Grindstaff 2004-04-20
6650332 Method and apparatus for implementing dynamic display memory Peter L. Doyle 2003-11-18
6633299 Method and apparatus for implementing smart allocation policies for a small frame buffer cache serving 3D and 2D streams Krishnan Sreenivas, Tom Piazza 2003-10-14
6628294 Prefetching of virtual-to-physical address translation for display data Jonathan Sadowsky 2003-09-30
6629253 System for efficient management of memory access requests from a planar video overlay data stream using a time delay Todd M. Witter, Kim A. Meinerth 2003-09-30
6560657 System and method for controlling peripheral devices Wishwesh Anil Gandhi, Peter L. Doyle 2003-05-06