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USPTO Patent Rankings Data through Dec 31, 2025
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Aditya Sreenivas — 38 Patents

Intel: 38 patents #934 of 30,777Top 4%
Folsom, CA: #62 of 1,500 inventorsTop 5%
California: #12,412 of 386,348 inventorsTop 4%
Overall (All Time): #84,675 of 4,157,543Top 3%
38 Patents All Time
Aditya Sreenivas has been granted 38 US patents while listed as an inventor at Intel. The first was granted in 1997 and the most recent in January 2017. Aditya Sreenivas ranks #84,675 of 4,157,543 US inventors in our database (top 2.0%). Patent records list Aditya Sreenivas in Folsom, CA, US.

Issued Patents All Time

Showing 1–25 of 38 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9542336 Isochronous agent data pinning in a multi-level memory system Marc Torrant, David Puffer, Blaise Fanning, Bryan R. White, Joydeep Ray +3 more 2017-01-10 $11,357,000
7612780 Optimized memory addressing David E. Freker, Zohar Bogin, Anoop Mukker, Tuong Trieu 2009-11-03 $21,230,000
7348986 Image rendering Peter L. Doyle 2008-03-25 $11,219,000
7321369 Method and apparatus for synchronizing processing of multiple asynchronous client queues on a graphics controller device David Wyatt 2008-01-22 $26,995,000
7230627 Optimized memory addressing David E. Freker, Zohar Bogin, Anoop Mukker, Tuong Trieu 2007-06-12 $15,149,000
7173627 Apparatus, method and system with a graphics-rendering engine having a graphics context manager Peter L. Doyle 2007-02-06 $13,917,000
7164427 Apparatus, method and system with a graphics-rendering engine having a time allocator Peter L. Doyle 2007-01-16 $22,781,000
7120774 Efficient management of memory access requests from a video data stream Todd M. Witter, Kim A. Meinerth 2006-10-10 $14,351,000
7103730 Method, system, and apparatus for reducing power consumption of a memory Alankar Saxena 2006-09-05 $13,820,000
7051172 Memory arbiter with intelligent page gathering logic Josh B. Mastronarde, Thomas A. Piazza 2006-05-23 $10,027,000
7035984 Memory arbiter with grace and ceiling periods and intelligent page gathering logic Josh B. Mastronarde, Thomas A. Piazza 2006-04-25 $12,896,000
6999091 Dual memory channel interleaving for graphics and video Alankar Saxena, Tom Piazza 2006-02-14 $11,997,000
6995773 Automatic memory management Peter L. Doyle 2006-02-07 $20,276,000
6954208 Depth write disable for rendering Peter L. Doyle 2005-10-11 $27,235,000
6885374 Apparatus, method and system with a graphics-rendering engine having a time allocator Peter L. Doyle 2005-04-26 $30,166,000
6867779 Image rendering Peter L. Doyle 2005-03-15 $27,410,000
6792516 Memory arbiter with intelligent page gathering logic Josh B. Mastronarde, Thomas A. Piazza 2004-09-14 $15,917,000
6747657 Depth write disable for zone rendering Peter L. Doyle 2004-06-08 $20,315,000
6747658 Automatic memory management for zone rendering Peter L. Doyle 2004-06-08 $20,315,000
6724389 Multiplexing digital video out on an accelerated graphics port interface Adam H. Wilen, Marcus Grindstaff 2004-04-20 $26,995,000
6650332 Method and apparatus for implementing dynamic display memory Peter L. Doyle 2003-11-18 $37,831,000
6633299 Method and apparatus for implementing smart allocation policies for a small frame buffer cache serving 3D and 2D streams Krishnan Sreenivas, Tom Piazza 2003-10-14 $51,971,000
6628294 Prefetching of virtual-to-physical address translation for display data Jonathan Sadowsky 2003-09-30 $25,999,000
6629253 System for efficient management of memory access requests from a planar video overlay data stream using a time delay Todd M. Witter, Kim A. Meinerth 2003-09-30 $25,999,000
6560657 System and method for controlling peripheral devices Wishwesh Anil Gandhi, Peter L. Doyle 2003-05-06 $49,233,000