AS

Aditya Sreenivas

IN Intel: 38 patents #927 of 30,777Top 4%
📍 Folsom, CA: #62 of 1,500 inventorsTop 5%
🗺 California: #12,236 of 386,348 inventorsTop 4%
Overall (All Time): #86,683 of 4,157,543Top 3%
38
Patents All Time

Issued Patents All Time

Showing 26–38 of 38 patents

Patent #TitleCo-InventorsDate
6538650 Efficient TLB entry management for the render operands residing in the tiled memory Surti Prasoonkumar 2003-03-25
6496193 Method and apparatus for fast loading of texture data into a tiled memory Prasoonkumar Surti 2002-12-17
6449702 Memory bandwidth utilization through multiple priority request policy for isochronous data streams Todd M. Witter, Sam Jensen 2002-09-10
6362826 Method and apparatus for implementing dynamic display memory Peter L. Doyle 2002-03-26
6330646 Arbitration mechanism for a computer system having a unified memory architecture Steve John Clohset, Trung Diep, Wishwesh Anil Gandhi, Thomas A. Piazza, Tuong Trieu 2001-12-11
6199149 Overlay counter for accelerated graphics port Kim A. Meinerth, Krishnan Sreenivas 2001-03-06
6141023 Efficient display flip Kim A. Meinerth, Krishnan Sreenivas, John A. Carey 2000-10-31
6078339 Mutual exclusion of drawing engine execution on a graphics device Kim A. Meinerth, Krishnan Sreenivas 2000-06-20
6067090 Data skew management of multiple 3-D graphic operand requests Kam Leung, Sajjad Zaidi, Brian D. Rauchfuss, John A. Carey, R. Hartog +1 more 2000-05-23
6025855 Store double word and status word write graphics primitives Kim A. Meinerth, Krishnan Sreenivas 2000-02-15
6026451 System for controlling a dispatch of requested data packets by generating size signals for buffer space availability and preventing a dispatch prior to a data request granted signal asserted 2000-02-15
5761444 Method and apparatus for dynamically deferring transactions Jasmin Ajanovic, Robert N. Murdoch, Timothy M. Dobbins, Stuart E. Sailer, Jeffrey L. Rabe 1998-06-02
5696768 Method and apparatus for data storage array tracking David J. Harriman, Russell W. Dyer 1997-12-09