Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12266033 | Destination update for blending modes in a graphics pipeline | Nilanjan Goswami, Christopher James Goodman, Kyle Durfee, Piyush Agarwal | 2025-04-01 |
| 12067959 | Partial rendering and tearing avoidance | Nilanjan Goswami, Hideo Tamama, Christopher James Goodman, Shanmathi Natarajan | 2024-08-20 |
| 11954805 | Occlusion of virtual objects in augmented reality by physical objects | Warren Andrew Hunt | 2024-04-09 |
| 11881143 | Display peak power management for artificial reality systems | Nilanjan Goswami, Eugene Gorbatov, Michael Yee | 2024-01-23 |
| 11615576 | Artificial reality system using superframes to communicate surface data | Richard Lawrence Greene, Benjamin C. Constable | 2023-03-28 |
| 11557095 | Occlusion of virtual objects in augmented reality by physical objects | Warren Andrew Hunt | 2023-01-17 |
| 11430141 | Artificial reality system using a multisurface display protocol to communicate surface data | Hideo Tamama, Alok Mathur | 2022-08-30 |
| 11145107 | Artificial reality system using superframes to communicate surface data | Richard Lawrence Greene, Benjamin C. Constable | 2021-10-12 |
| 11107280 | Occlusion of virtual objects in augmented reality by physical objects | Warren Andrew Hunt | 2021-08-31 |
| 8238611 | Enhancing stereo depth measurements with projected texture | Pierre St. Hilaire, Gaile Gordon, John Iselin Woodfill, Ronald John Buck | 2012-08-07 |
| 7970177 | Enhancing stereo depth measurements with projected texture | Pierre St. Hilaire, Gaile Gordon, John Iselin Woodfill, Ronald John Buck | 2011-06-28 |
| 7525977 | Control mechanism for mapping cells and packets | Eduard Lecha, Vasan Karighattam, Soowan Suh, Jing Ling, Juan-Carlos Calderon +1 more | 2009-04-28 |
| 6892284 | Dynamic memory allocation for assigning partitions to a logical port from two groups of un-assigned partitions based on two threshold values | Jing Ling, Juan-Carlos Calderon, Jean-Michel Caia, Vivek Joshi, Anguo Huang | 2005-05-10 |
| 6782435 | Device for spatially and temporally reordering for data between a processor, memory and peripherals | Serafin E. Garcia, Zohar Bogin, Mikal C. Hunsaker | 2004-08-24 |
| 6629217 | Method and apparatus for improving read latency for processor to system memory read transactions | Tuong Trieu, Wishwesh Anil Gandhi | 2003-09-30 |
| 6502150 | Method and apparatus for resource sharing in a multi-processor system | Zohar Bogin, Narendra S. Khandekar | 2002-12-31 |
| 6487623 | Replacement, upgrade and/or addition of hot-pluggable components in a computer system | Theodore F. Emerson, Vincent Nguyen, Peter Michels | 2002-11-26 |
| 6330646 | Arbitration mechanism for a computer system having a unified memory architecture | Trung Diep, Wishwesh Anil Gandhi, Thomas A. Piazza, Aditya Sreenivas, Tuong Trieu | 2001-12-11 |
| 6314497 | Apparatus and method for maintaining cache coherency in a memory system | Narendra S. Khandekar, Zohar Bogin | 2001-11-06 |
| 6173354 | Method and apparatus for decoupling internal latencies of a bus bridge from those on an external bus | Narendra S. Khandekar, Zohar Bogin | 2001-01-09 |