Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6725339 | Processing ordered data requests to a memory | John Fu, Dean Mulla, Gregory S. Mathews, Jeng-Jye Shaw | 2004-04-20 |
| 6542966 | Method and apparatus for managing temporal and non-temporal data in a single cache structure | John H. Crawford, Gautam Doshi, John Fu, Gregory S. Mathews | 2003-04-01 |
| 6438650 | Method and apparatus for processing cache misses | Nhon Quach, Sunny C. Huang, Jeen-Yuan Miin, Huang Kuang Hu, Michael Corwin | 2002-08-20 |
| 6418521 | Hierarchical fully-associative-translation lookaside buffer structure | Gregory S. Mathews, Dean Mulla, John Wai Cheong Fu | 2002-07-09 |
| 6381678 | Processing ordered data requests to a memory | John Fu, Dean Mulla, Gregory S. Mathews, Jeng-Jye Shaw | 2002-04-30 |
| 6272597 | Dual-ported, pipelined, two level cache system | John Fu, Dean Mulla, Gregory S. Mathews | 2001-08-07 |
| 5761444 | Method and apparatus for dynamically deferring transactions | Jasmin Ajanovic, Robert N. Murdoch, Timothy M. Dobbins, Aditya Sreenivas, Jeffrey L. Rabe | 1998-06-02 |