Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8087024 | Multiple multi-threaded processors having an L1 instruction cache and a shared L2 instruction cache | Sridhar Lakshmanamurthy, Wilson Liao, Prashant R. Chandra, Yim Pun | 2011-12-27 |
| 7536692 | Thread-based engine cache partitioning | Sridhar Lakshmanamurthy, Wilson Liao, Prashant R. Chandra, Yim Pun | 2009-05-19 |
| 7376877 | Combined tag and data ECC for enhanced soft error recovery from cache tag errors | Nhon Quach, John Fu, Sunny C. Huang, Dean Mulla | 2008-05-20 |
| 7337371 | Method and apparatus to handle parity errors in flow control channels | Chen-Chi Kuo, Sridhar Lakshmanamurthy, Raymond Ng | 2008-02-26 |
| 7275145 | Processing element with next and previous neighbor registers for direct data transfer | Sridhar Lakshmanamurthy, Prashant R. Chandra, Wilson Liao, Pun Yim, Chen-Chi Kuo +1 more | 2007-09-25 |
| 6802039 | Using hardware or firmware for cache tag and data ECC soft error correction | Nhon Quach | 2004-10-05 |
| 6772383 | Combined tag and data ECC for enhanced soft error recovery from cache tag errors | Nhon Quach, John Fu, Sunny C. Huang, Dean Mulla | 2004-08-03 |
| 6574689 | Method and apparatus for live-lock prevention | Nazar Zaidi | 2003-06-03 |
| 6438650 | Method and apparatus for processing cache misses | Nhon Quach, Sunny C. Huang, Huang Kuang Hu, Stuart E. Sailer, Michael Corwin | 2002-08-20 |