Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Michael Corwin — 27 Patents

TUTeradata Us: 12 patents #19 of 510Top 4%
Intel: 9 patents #4,462 of 30,777Top 15%
ICIdea Company: 2 patents #8 of 36Top 25%
MCMcdata: 2 patents #10 of 53Top 20%
SSSanera Systems: 2 patents #5 of 10Top 50%
Sunnyvale, CA: #881 of 14,302 inventorsTop 7%
California: #19,967 of 386,348 inventorsTop 6%
Overall (All Time): #142,059 of 4,157,543Top 4%
27 Patents All Time
Michael Corwin has been granted 27 US patents while listed as an inventor at Teradata Us. The first was granted in 2000 and the most recent in October 2020. Michael Corwin ranks #142,059 of 4,157,543 US inventors in our database (top 3.4%). Patent records list Michael Corwin in Sunnyvale, CA, US.

Issued Patents All Time

Showing 1–25 of 27 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10803066 Methods and systems for hardware acceleration of database operations and queries for a versioned database based on multiple hardware accelerators James Shau, Jeremy Branscome, Krishnan Meiyyappan, Hung Tran, Alan Beck +2 more 2020-10-13 $23,454,000
9542442 Accessing data in a column store database based on hardware compatible indexing and replicated reordered columns Krishnan Meiyyappan, Liuxi Yang, Jeremy Branscome, Ravindran Krishnamurthy, Kapil Surlaker +2 more 2017-01-10 $12,069,000
9378231 Accessing data in column store database based on hardware compatible data structures Liuxi Yang, Kapil Surlaker, Ravi Krishnamurthy, Jeremy Branscome, Krishnan Meiyyappan +1 more 2016-06-28 $8,952,000
9208829 Designated memory sub-channels for computing systems and environments Norm Smith, Liuxi Lang, Jeremy Branscome 2015-12-08 $16,024,000
9141670 Methods and systems for hardware acceleration of streamed database operations and queries based on multiple hardware accelerators Jeremy Branscome, Joseph I. Chamdani, Rajasekhar Cherabuddi 2015-09-22 $6,978,000
8862625 Accessing data in a column store database based on hardware compatible indexing and replicated reordered columns Krishnan Meiyyappan, Liuxi Yang, Jeremy Branscome, Ravi Krishnamurthy, Kapil Surlaker +2 more 2014-10-14 $46,369,000
8244718 Methods and systems for hardware acceleration of database operations and queries Joseph I. Chamdani, Raj Cherabuddi, Jeremy Branscome, Liuxi Yang, Ravi Krishnamurthy 2012-08-14 $93,004,000
8234267 Hardware accelerated reconfigurable processor for accelerating database operations and queries Jeremy Branscome, Liuxi Yang, Joseph I. Chamdani 2012-07-31 $21,502,000
8229918 Hardware accelerated reconfigurable processor for accelerating database operations and queries Jeremy Branscome, Liuxi Yang, Joseph I. Chamdani 2012-07-24 $42,482,000
8224800 Hardware accelerated reconfigurable processor for accelerating database operations and queries Jeremy Branscome, Liuxi Yang, Joseph I. Chamdani 2012-07-17 $86,905,000
7966343 Accessing data in a column store database based on hardware compatible data structures Liuxi Yang, Kapil Surlaker, Ravi Krishnamurthy, Jeremy Branscome, Krishnan Meiyyappan +1 more 2011-06-21 $26,793,000
7952997 Congestion management groups Joseph I. Chamdani, Stephen Trevitt 2011-05-31
7908259 Hardware accelerated reconfigurable processor for accelerating database operations and queries Jeremy Branscome, Liuxi Yang, Joseph I. Chamdani 2011-03-15 $24,810,000
7606968 Multi-level content addressable memory Jeremy Branscome 2009-10-20
7110394 Packet switching apparatus including cascade ports and method for switching packets Joseph I. Chamdani, Matthew S. Rogge 2006-09-19
6985975 Packet lockstep system and method Joseph I. Chamdani 2006-01-10
6611910 Method for processing branch operations Harshvardhan Sharangpani, Tse-Yu Yeh, Millind Mittal, Kent Fielden, Dale Morris +3 more 2003-08-26
6591359 Speculative renaming of data-processor registers David T. Hass, Luke E. Girard, Ken Arora, Harshvardhan Sharangpani, Syed Reza 2003-07-08 $70,913,000
6550001 Method and implementation of statistical detection of read after write and write after write hazards Dale Morris 2003-04-15 $60,735,000
6438650 Method and apparatus for processing cache misses Nhon Quach, Sunny C. Huang, Jeen-Yuan Miin, Huang Kuang Hu, Stuart E. Sailer 2002-08-20 $43,289,000
6438682 Method and apparatus for predicting loop exit branches Dale Morris, Mircea Poplingher, Tse-Yu Yeh, Wenliang Chen 2002-08-20 $43,289,000
6378063 Method and apparatus for efficiently routing dependent instructions to clustered execution units Harshvardhan Sharangpani, Hans Mulder, Ken Arora 2002-04-23 $65,430,000
6304960 Validating prediction for branches in a cluster via comparison of predicted and condition selected tentative target addresses and validation of branch conditions Tse-Yu Yeh, Judge K. Arora, Sujat Jamil, Sailesh Kottapalli 2001-10-16 $231,350,000
6240510 System for processing a cluster of instructions where the instructions are issued to the execution units having a priority order according to a template associated with the cluster of instructions Tse-Yu Yeh, Harshvardhan Sharangpani, Sujat Jamil 2001-05-29 $200,835,000
6237077 Instruction template for efficient processing clustered branch instructions Harshvardhan Sharangpani, Dale Morris, Kent Fielden, Tse-Yu Yeh, Hans Mulder +1 more 2001-05-22