Issued Patents All Time
Showing 1–25 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10230542 | Interconnected ring network in a multi-processor system | Eitan Joshua, Shaul Chapman, Erez Amit, Noam Mizrahi, Moshe Raz +3 more | 2019-03-12 |
| 10083126 | Apparatus and method for avoiding conflicting entries in a storage structure | Richard Bryant, Max John Batley, Lilian Atieno Hutchins | 2018-09-25 |
| 9934152 | Method and apparatus to use hardware alias detection and management in a virtually indexed physically tagged cache | Richard Bryant, R. Frank O'Bleness, Kim Schuttenberg | 2018-04-03 |
| 9892051 | Method and apparatus for use of a preload instruction to improve efficiency of cache | R. Frank O'Bleness, Russell J. Robideau, Tom Hameenanttila, Joseph Delgross, David E. Miner | 2018-02-13 |
| 9842051 | Managing aliasing in a virtually indexed physically tagged cache | Kim Schuttenberg, Richard Bryant, R. Frank O'Bleness | 2017-12-12 |
| 9606800 | Method and apparatus for sharing instruction scheduling resources among a plurality of execution threads in a multi-threaded processor architecture | Tom Hameenanttila, R. Frank O'Bleness, Joseph Delgross | 2017-03-28 |
| 9454480 | Interconnected ring network in a multi-processor system | Eitan Joshua, Erez Amit, Shaul Chapman, Frank O'Bleness | 2016-09-27 |
| 9442735 | Method and apparatus for processing speculative, out-of-order memory access instructions | R. Frank O'Bleness, Tom Hameenanttila, Joseph Delgross | 2016-09-13 |
| 9223709 | Thread-aware cache memory management | R. Frank O'Bleness, Tom Hameenanttila, Joseph Delgross | 2015-12-29 |
| 9116742 | Systems and methods for reducing interrupt latency | Kim Schuttenberg, R. Frank O'Bleness | 2015-08-25 |
| 9086976 | Method and apparatus for associating requests and responses with identification information | R. Frank O'Bleness, David E. Miner, Tom Hameenanttila, Jeffrey Kehl, Richard Bryant +1 more | 2015-07-21 |
| 9058272 | Method and apparatus having a snoop filter decoupled from an associated cache and a buffer for replacement line addresses | Frank O'Bleness, David E. Miner, Joseph Delgross, Tom Hameenanttila, Jeffrey Kehl +1 more | 2015-06-16 |
| 9026769 | Detecting and reissuing of loop instructions in reorder structure | R. Frank O'Bleness, Joseph Delgross, Tom Hameenanttila | 2015-05-05 |
| 8990505 | Cache memory bank selection | R. Frank O'Bleness, David E. Miner, Joseph Delgross, Tom Hameenanttila | 2015-03-24 |
| 8943273 | Method and apparatus for improving cache efficiency | R. Frank O'Bleness, Russell J. Robideau, Tom Hameenanttila, Joseph Delgross, David E. Miner | 2015-01-27 |
| 8918625 | Speculative scheduling of memory instructions in out-of-order processor based on addressing mode comparison | R. Frank O'Bleness, Tom Hameenanttila | 2014-12-23 |
| 8806181 | Dynamic pipeline reconfiguration including changing a number of stages | R. Frank O'Bleness, Timothy S. Beatty, Franco Ricci, Tom Hameenanttila, Hong-Yi Chen | 2014-08-12 |
| 8769204 | Programmable cache access protocol to optimize power consumption and performance | Joseph Delgross, R. Frank O'Bleness, Tom Hameenanttila, David E. Miner | 2014-07-01 |
| 8688761 | Arithmetic logic and shifting device for use in a processor | Muhammad Ahmed, Ajay Anant Ingle | 2014-04-01 |
| 8688919 | Method and apparatus for associating requests and responses with identification information | R. Frank O'Bleness, David E. Miner, Tom Hameenanttila, Jeffrey Kehl, Richard Bryant +1 more | 2014-04-01 |
| 8631206 | Way-selecting translation lookaside buffer | R. Frank O'Bleness, David E. Miner, Joseph Delgross, Tom Hameenanttila | 2014-01-14 |
| 8533401 | Implementing direct access caches in coherent multiprocessors | Samantha J. Edirisooriya, David E. Miner, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen | 2013-09-10 |
| 8458404 | Programmable cache access protocol to optimize power consumption and performance | Joseph Delgross, R. Frank O'Bleness, Tom Hameenanttila, David E. Miner | 2013-06-04 |
| 8296525 | Method and apparatus for data-less bus query | Frank O'Bleness, David E. Miner, Tom Hameenanttila, Jeffrey Kehl, Richard Bryant +1 more | 2012-10-23 |
| 8195916 | Apparatus and method to translate virtual addresses to physical addresses in a base plus offset addressing mode | Paul Bassett, Ajay Anant Ingle, Lucian Codrescu, Muhammad Ahmed | 2012-06-05 |