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USPTO Patent Rankings Data through Dec 31, 2025
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David E. Miner — 42 Patents

Intel: 20 patents #2,048 of 30,777Top 7%
Disney: 19 patents #352 of 6,686Top 6%
AAAir Liquide America: 1 patents #39 of 97Top 45%
AAAir Liquide America: 1 patents #12 of 66Top 20%
ALAmerican Air Liquide: 1 patents #181 of 326Top 60%
Chandler, AZ: #90 of 3,331 inventorsTop 3%
Arizona: #593 of 32,909 inventorsTop 2%
Overall (All Time): #72,062 of 4,157,543Top 2%
42 Patents All Time
David E. Miner has been granted 42 US patents while listed as an inventor at Intel. The first was granted in 2002 and the most recent in February 2018. David E. Miner ranks #72,062 of 4,157,543 US inventors in our database (top 1.7%). Patent records list David E. Miner in Chandler, AZ, US.

Issued Patents All Time

Showing 1–25 of 42 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9892051 Method and apparatus for use of a preload instruction to improve efficiency of cache Sujat Jamil, R. Frank O'Bleness, Russell J. Robideau, Tom Hameenanttila, Joseph Delgross 2018-02-13 $66,748,000
9086976 Method and apparatus for associating requests and responses with identification information R. Frank O'Bleness, Sujat Jamil, Tom Hameenanttila, Jeffrey Kehl, Richard Bryant +1 more 2015-07-21 $1,599,000
9058272 Method and apparatus having a snoop filter decoupled from an associated cache and a buffer for replacement line addresses Frank O'Bleness, Sujat Jamil, Joseph Delgross, Tom Hameenanttila, Jeffrey Kehl +1 more 2015-06-16 $4,763,000
8990505 Cache memory bank selection Sujat Jamil, R. Frank O'Bleness, Joseph Delgross, Tom Hameenanttila 2015-03-24 $1,572,000
8943273 Method and apparatus for improving cache efficiency Sujat Jamil, R. Frank O'Bleness, Russell J. Robideau, Tom Hameenanttila, Joseph Delgross 2015-01-27 $2,555,000
8769204 Programmable cache access protocol to optimize power consumption and performance Joseph Delgross, Sujat Jamil, R. Frank O'Bleness, Tom Hameenanttila 2014-07-01 $1,608,000
8688919 Method and apparatus for associating requests and responses with identification information R. Frank O'Bleness, Sujat Jamil, Tom Hameenanttila, Jeffrey Kehl, Richard Bryant +1 more 2014-04-01 $1,942,000
8631206 Way-selecting translation lookaside buffer R. Frank O'Bleness, Sujat Jamil, Joseph Delgross, Tom Hameenanttila 2014-01-14 $2,595,000
8533401 Implementing direct access caches in coherent multiprocessors Samantha J. Edirisooriya, Sujat Jamil, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen 2013-09-10 $11,653,000
8458404 Programmable cache access protocol to optimize power consumption and performance Joseph Delgross, Sujat Jamil, R. Frank O'Bleness, Tom Hameenanttila 2013-06-04 $2,487,000
8296525 Method and apparatus for data-less bus query Frank O'Bleness, Sujat Jamil, Tom Hameenanttila, Jeffrey Kehl, Richard Bryant +1 more 2012-10-23 $1,772,000
8135916 Method and apparatus for hardware-configurable multi-policy coherence protocol R. Frank O'Bleness, Sujat Jamil, Joseph Delgross, Tom Hameenanttila, Jeffrey Kehl 2012-03-13 $8,357,000
8065576 Test access port Steven Tu, Scott W. Murray 2011-11-22 $16,463,000
7966477 Power optimized replay of blocked operations in a pipilined architecture Sujat Jamil, Hang T. Nguyen, Samantha J. Edirisooriya, R. Frank O'Bleness, Steven Tu 2011-06-21 $10,166,000
7765349 Apparatus and method for arbitrating heterogeneous agents in on-chip busses Samantha J. Edirisooriya, Sujat Jamil, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen 2010-07-27 $5,483,000
7757046 Method and apparatus for optimizing line writes in cache coherent systems Sujat Jamil, Hang T. Nguyen, Samantha J. Edirisooriya, R. Frank O'Bleness, Steven Tu 2010-07-13 $17,820,000
7725683 Apparatus and method for power optimized replay via selective recirculation of instructions Sujat Jamil, Hang T. Nguyen, Samantha J. Edirisooriya, R. Frank O'Bleness, Steven Tu 2010-05-25 $15,062,000
7685379 Cache memory to support a processor's power mode of operation Samantha J. Edirisooriya, Sujat Jamil, R. Frank O'Bleness, Steven Tu 2010-03-23 $13,395,000
7640387 Method and apparatus for implementing heterogeneous interconnects Samantha J. Edirisooriya, Steven Tu, Gregory Tse, Sujat Jamil, R. Frank O'Bleness +1 more 2009-12-29 $18,144,000
7634603 System and apparatus for early fixed latency subtractive decoding Samantha J. Edirisooriya, Sujat Jamil, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen 2009-12-15 $21,307,000
7627797 Test access port Steven Tu, Scott W. Murray 2009-12-01 $24,844,000
7487299 Cache memory to support a processor's power mode of operation Samantha J. Edirisooriya, Sujat Jamil, R. Frank O'Bleness, Steven Tu 2009-02-03 $17,091,000
7464227 Method and apparatus for supporting opportunistic sharing in coherent multiprocessors Samantha J. Edirisooriya, Sujat Jamil, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen 2008-12-09 $23,879,000
7428607 Apparatus and method for arbitrating heterogeneous agents in on-chip busses Samantha J. Edirisooriya, Sujat Jamil, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen 2008-09-23 $12,692,000
7406552 Systems and methods for early fixed latency subtractive decoding including speculative acknowledging Samantha J. Edirisooriya, Sujat Jamil, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen 2008-07-29 $16,946,000