Issued Patents All Time
Showing 1–25 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10990546 | Hardware-based virtual machine communication supporting direct memory access data transfer | Geetani R. Edirisooriya, Roger C. Jeppsen, Pankaj Kumar | 2021-04-27 |
| 10810138 | Enhanced storage encryption with total memory encryption (TME) and multi-key total memory encryption (MKTME) | Robert Z. Papp | 2020-10-20 |
| 10679690 | Method and apparatus for completing pending write requests to volatile memory prior to transitioning to self-refresh mode | Shanker R. Nagesh, K L Siva Prasad Gadey N V, Blaine R. Monson, Pankaj Kumar | 2020-06-09 |
| 10241947 | Hardware-based virtual machine communication | Geetani R. Edirisooriya, Roger C. Jeppsen, Pankaj Kumar | 2019-03-26 |
| 10235302 | Invalidating reads for cache utilization in processors | Geetani R. Edirisooriya | 2019-03-19 |
| 10127968 | Method and apparatus for completing pending write requests to volatile memory prior to transitioning to self-refresh mode | Shanker R. Nagesh, K L Siva Prasad Gadey N V, Blaine R. Monson, Pankaj Kumar | 2018-11-13 |
| 9953001 | Method, apparatus, and system for plugin mechanism of computer extension bus | Roger C. Jeppsen, Pankaj Kumar, Blaine R. Monson | 2018-04-24 |
| 8533401 | Implementing direct access caches in coherent multiprocessors | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen | 2013-09-10 |
| 8156406 | Method and system for syndrome generation and data recovery | Gregory Tse, Mark A. Schmisseur, Robert L. Sheffield | 2012-04-10 |
| 7966477 | Power optimized replay of blocked operations in a pipilined architecture | Sujat Jamil, Hang T. Nguyen, David E. Miner, R. Frank O'Bleness, Steven Tu | 2011-06-21 |
| 7765349 | Apparatus and method for arbitrating heterogeneous agents in on-chip busses | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen | 2010-07-27 |
| 7757046 | Method and apparatus for optimizing line writes in cache coherent systems | Sujat Jamil, Hang T. Nguyen, David E. Miner, R. Frank O'Bleness, Steven Tu | 2010-07-13 |
| 7725683 | Apparatus and method for power optimized replay via selective recirculation of instructions | Sujat Jamil, Hang T. Nguyen, David E. Miner, R. Frank O'Bleness, Steven Tu | 2010-05-25 |
| 7698476 | Implementing bufferless direct memory access (DMA) controllers using split transactions | — | 2010-04-13 |
| 7685379 | Cache memory to support a processor's power mode of operation | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu | 2010-03-23 |
| 7640387 | Method and apparatus for implementing heterogeneous interconnects | Steven Tu, Gregory Tse, Sujat Jamil, David E. Miner, R. Frank O'Bleness +1 more | 2009-12-29 |
| 7634603 | System and apparatus for early fixed latency subtractive decoding | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen | 2009-12-15 |
| 7487299 | Cache memory to support a processor's power mode of operation | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu | 2009-02-03 |
| 7464227 | Method and apparatus for supporting opportunistic sharing in coherent multiprocessors | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen | 2008-12-09 |
| 7447810 | Implementing bufferless Direct Memory Access (DMA) controllers using split transactions | — | 2008-11-04 |
| 7428607 | Apparatus and method for arbitrating heterogeneous agents in on-chip busses | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen | 2008-09-23 |
| 7406552 | Systems and methods for early fixed latency subtractive decoding including speculative acknowledging | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen | 2008-07-29 |
| 7406553 | System and apparatus for early fixed latency subtractive decoding | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu, Hang T. Nguyen | 2008-07-29 |
| 7404043 | Cache memory to support a processor's power mode of operation | Sujat Jamil, David E. Miner, R. Frank O'Bleness, Steven Tu | 2008-07-22 |
| 7366845 | Pushing of clean data to one or more processors in a system having a coherency protocol | Sujat Jamil, Hang T. Nguyen, David E. Miner, R. Frank O'Bleness, Steven Tu | 2008-04-29 |