| 6658559 |
Method and apparatus for advancing load operations |
Gregory S. Mathews, Ghassan Khadder, Sreenivas Aerra Reddy |
2003-12-02 |
| 6629238 |
Predicate controlled software pipelined loop processing with prediction of predicate writing and value prediction for use in subsequent iteration |
Tse-Yu Yeh |
2003-09-30 |
| 6598156 |
Mechanism for handling failing load check instructions |
— |
2003-07-22 |
| 6442678 |
Method and apparatus for providing data to a processor pipeline |
— |
2002-08-27 |
| 6401195 |
Method and apparatus for replacing data in an operand latch of a pipeline stage in a processor during a stall |
Harshvardhan Sharangpani, Ghassan Khadder |
2002-06-04 |
| 6393556 |
Apparatus and method to change processor privilege without pipeline flush |
— |
2002-05-21 |
| 6304955 |
Method and apparatus for performing latency based hazard detection |
— |
2001-10-16 |
| 6304960 |
Validating prediction for branches in a cluster via comparison of predicted and condition selected tentative target addresses and validation of branch conditions |
Tse-Yu Yeh, Michael Corwin, Sujat Jamil, Sailesh Kottapalli |
2001-10-16 |
| 6272520 |
Method for detecting thread switch events |
Harshvardhan Sharangpani, Rajiv Gupta |
2001-08-07 |
| 6219781 |
Method and apparatus for performing register hazard detection |
— |
2001-04-17 |
| 6199144 |
Method and apparatus for transferring data in a computer system |
William R. Bryg, Stephen G. Burger, Gary N. Hammond, Michael L. Ziegler |
2001-03-06 |
| 6119218 |
Method and apparatus for prefetching data in a computer system |
Jack Mills, Jerome C. Huck |
2000-09-12 |
| 6115808 |
Method and apparatus for performing predicate hazard detection |
— |
2000-09-05 |
| 6065115 |
Processor and method for speculatively executing instructions from multiple instruction streams indicated by a branch instruction |
Harshvardhan Sharangpani, Gary N. Hammond, Hans Mulder |
2000-05-16 |
| 5948095 |
Method and apparatus for prefetching data in a computer system |
Jack Mills, Jerome C. Huck |
1999-09-07 |
| 5860017 |
Processor and method for speculatively executing instructions from multiple instruction streams indicated by a branch instruction |
Harshvardhan Sharangpani, Gary N. Hammond, Hans Mulder |
1999-01-12 |
| 5832260 |
Processor microarchitecture for efficient processing of instructions in a program including a conditional program flow control instruction |
Gary N. Hammond, Harshvardhan Sharangpani |
1998-11-03 |