Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7085919 | Predicate prediction based on a predicated predicate value | Edward T. Grochowski, Vincent E. Hummel | 2006-08-01 |
| 7062639 | Method and apparatus for performing predicate prediction | Edward T. Grochowski | 2006-06-13 |
| 6757814 | Method and apparatus for performing predicate prediction | Ralph M. Kling, Edward T. Grochowski | 2004-06-29 |
| 6462943 | Method and apparatus for retrofit mounting a VLSI chip to a computer chassis for current supply | Shekhar Y. Borkar, Robert S. Dreyer | 2002-10-08 |
| 6378063 | Method and apparatus for efficiently routing dependent instructions to clustered execution units | Michael Corwin, Harshvardhan Sharangpani, Ken Arora | 2002-04-23 |
| 6367004 | Method and apparatus for predicting a predicate based on historical information and the least significant bits of operands to be compared | Edward T. Grochowski, Vincent E. Hummel | 2002-04-02 |
| 6353883 | Method and apparatus for performing predicate prediction | Edward T. Grochowski | 2002-03-05 |
| 6237077 | Instruction template for efficient processing clustered branch instructions | Harshvardhan Sharangpani, Michael Corwin, Dale Morris, Kent Fielden, Tse-Yu Yeh +1 more | 2001-05-22 |
| 6137688 | Apparatus for retrofit mounting a VLSI chip to a computer chassis for current supply | Shekhar Y. Borkar, Robert S. Dreyer | 2000-10-24 |
| 6067232 | System for connecting subsystems of dissimilar thermal properties | Shekhar Y. Borkar, Robert S. Dreyer | 2000-05-23 |
| 6065115 | Processor and method for speculatively executing instructions from multiple instruction streams indicated by a branch instruction | Harshvardhan Sharangpani, Gary N. Hammond, Judge K. Arora | 2000-05-16 |
| 6035389 | Scheduling instructions with different latencies | Edward T. Grochowski, Derrick C. Lin | 2000-03-07 |
| 6018465 | Apparatus for mounting a chip package to a chassis of a computer | Shekhar Y. Borkar, Robert S. Dreyer, Naomi Obinata, Calvin E. Wells | 2000-01-25 |
| 5978228 | Apparatus for mounting a very large scale integration (VLSI) chip to a computer chassis for cooling | Shekhar Y. Borkar, Robert S. Dreyer | 1999-11-02 |
| 5969944 | Method and apparatus for mounting a very large scale integration (VLSI) chip package to a computer chasis for cooling | Shekhar Y. Borkar, Robert S. Dreyer, Naomi Obinata, Calvin E. Wells | 1999-10-19 |
| 5903750 | Dynamic branch prediction for branch instructions with multiple targets | Tse-Yu Yeh, Mircea Poplingher, Wenliang Chen | 1999-05-11 |
| 5860017 | Processor and method for speculatively executing instructions from multiple instruction streams indicated by a branch instruction | Harshvardhan Sharangpani, Gary N. Hammond, Judge K. Arora | 1999-01-12 |
| 5764959 | Adaptive 128-bit floating point load and store instructions for quad-precision compatibility | Harshvardhan Sharangpani, Donald B. Alpert | 1998-06-09 |
| 5742804 | Instruction prefetch mechanism utilizing a branch predict instruction | Tse-Yu Yeh, Mircea Poplingher, Kent Fielden, Rajiv Gupta, Dale Morris +1 more | 1998-04-21 |
| 5729724 | Adaptive 128-bit floating point load and store operations for quadruple precision compatibility | Harshvardhan Sharangpani, Donald B. Alpert | 1998-03-17 |
| 5699537 | Processor microarchitecture for efficient dynamic scheduling and execution of chains of dependent instructions | Harshvardhan Sharangpani, Kent Fielden | 1997-12-16 |