| 8214830 |
Performance in a virtualization architecture with a processor abstraction layer |
Hin L. Leung, Amy L. Santoni, William R. Greene, Kushagra Vaid, Dale Morris +1 more |
2012-07-03 |
$15,024,000 |
| 7441107 |
Utilizing an advanced load address table for memory disambiguation in an out of order processor |
Carl Scafidi |
2008-10-21 |
$17,085,000 |
| 7395415 |
Method and apparatus to provide a source operand for an instruction in a processor |
Carl Scafidi, John H. Crawford |
2008-07-01 |
$20,189,000 |
| 7392369 |
Decomposing architectural operation into speculative and architectural micro-operations for speculative execution of others and for violation check |
Jeffery J. Baxter, Nazar Zaidi |
2008-06-24 |
$20,489,000 |
| 7383374 |
Method and apparatus for managing virtual addresses |
Koichi Yamada, Felix Leung, Amy L. Santoni, Asit K. Mallick, Rohit Seth |
2008-06-03 |
$37,699,000 |
| 7330963 |
Resolving all previous potentially excepting architectural operations before issuing store architectural operation |
Jeffery J. Baxter, Nazar Zaidi |
2008-02-12 |
$36,180,000 |
| 7263567 |
Method and apparatus for lowering the die temperature of a microprocessor and maintaining the temperature below the die burn out |
Ganesh Subramaniyam |
2007-08-28 |
$16,981,000 |
| 7062636 |
Ordering scheme with architectural operation decomposed into result producing speculative micro-operation and exception producing architectural micro-operation |
Jeffery J. Baxter, Nazar Zaidi |
2006-06-13 |
$12,187,000 |
| 6711653 |
Flexible mechanism for enforcing coherency among caching structures |
Nhon Quach |
2004-03-23 |
$37,745,000 |
| 6625693 |
Fast exception processing |
Ken Arora, Harshvardhan Sharangpani |
2003-09-23 |
$27,638,000 |
| 6604184 |
Virtual memory mapping using region-based page tables |
Achmed R. Zahir, John H. Crawford |
2003-08-05 |
$104,198,000 |
| 6584558 |
Article for providing event handling functionality in a processor supporting different instruction sets |
Donald B. Alpert, Kevin C. Kahn, Harsh Sharangpani |
2003-06-24 |
$97,005,000 |
| 6584573 |
Placing a computer system into a sleeping state |
Russ Wunderlich, Yan Li, Mani Ayyar |
2003-06-24 |
$97,005,000 |
| 6560689 |
TLB using region ID prevalidation |
Gregory S. Mathews |
2003-05-06 |
$49,233,000 |
| 6542981 |
Microcode upgrade and special function support by executing RISC instruction to invoke resident microcode |
Nazar Zaidi, Kin-Yip Liu, Tse-Yu Yeh |
2003-04-01 |
$56,060,000 |
| 6430657 |
COMPUTER SYSTEM THAT PROVIDES ATOMICITY BY USING A TLB TO INDICATE WHETHER AN EXPORTABLE INSTRUCTION SHOULD BE EXECUTED USING CACHE COHERENCY OR BY EXPORTING THE EXPORTABLE INSTRUCTION, AND EMULATES INSTRUCTIONS SPECIFYING A BUS LOCK |
Millind Mittal, Martin J. Whittaker, Jerome C. Huck |
2002-08-06 |
|
| 6430670 |
Apparatus and method for a virtual hashed page table |
William R. Bryg, Stephen G. Burger, James O. Hays, John M. Kessenich, Jonathan Ross +2 more |
2002-08-06 |
$13,453,000 |
| 6408386 |
Method and apparatus for providing event handling functionality in a computer system |
Donald B. Alpert, Kevin C. Kahn, Harsh Sharangpani |
2002-06-18 |
$57,699,000 |
| 6408373 |
Method and apparatus for pre-validating regions in a virtual addressing scheme |
Stephen G. Burger, James O. Hays, Jonathan Ross, William R. Bryg, Rajiv Gupta +1 more |
2002-06-18 |
|
| 6397301 |
Preventing access to secure area of a cache |
Nhon Quach, Kin-Yip Liu |
2002-05-28 |
$93,259,000 |
| 6393544 |
Method and apparatus for calculating a page table index from a virtual address |
William R. Bryg, Stephen G. Burger, James O. Hays, Jerome C. Huck, Jonathan Ross +2 more |
2002-05-21 |
|
| 6219774 |
Address translation with/bypassing intermediate segmentation translation to accommodate two different instruction set architecture |
Donald B. Alpert, Kevin C. Kahn, Harsh Sharangpani |
2001-04-17 |
$203,289,000 |
| 6216214 |
Apparatus and method for a virtual hashed page table |
William R. Bryg, Stephen G. Burger, James O. Hays, John M. Kessenich, Jonathan Ross +2 more |
2001-04-10 |
|
| 6209085 |
Method and apparatus for performing process switching in multiprocessor computer systems |
Koichi Yamada |
2001-03-27 |
$117,605,000 |
| 6199144 |
Method and apparatus for transferring data in a computer system |
Judge K. Arora, William R. Bryg, Stephen G. Burger, Michael L. Ziegler |
2001-03-06 |
$156,843,000 |
