KK

Kevin C. Kahn

IN Intel: 24 patents #1,642 of 30,777Top 6%
Overall (All Time): #172,658 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11044196 Multi-protocol I/O interconnect including a switching fabric Prashant R. Chandra 2021-06-22
10110480 Multi-protocol I/O interconnect including a switching fabric Prashant R. Chandra 2018-10-23
9565132 Multi-protocol I/O interconnect including a switching fabric Prashant R. Chandra 2017-02-07
9430435 Multi-protocol tunneling over an I/O interconnect Prashant R. Chandra, Eran Galil, Efraim Kugman, Naama Zolotov, Vladimir Yudovich +2 more 2016-08-30
9252970 Multi-protocol I/O interconnect architecture Prashant R. Chandra 2016-02-02
9047222 Unified multi-transport medium connector architecture Prashant R. Chandra, Ajay V. Bhatt, Steven B. McGowan 2015-06-02
8856420 Multi-protocol I/O interconnect flow control Prashant R. Chandra 2014-10-07
8775713 Multi-protocol tunneling over an I/O interconnect Prashant R. Chandra, Eran Galil, Efraim Kugman, Naama Zolotov, Vladimir Yudovich +2 more 2014-07-08
8700821 Unified multi-transport medium connector architecture Prashant R. Chandra, Ajay V. Bhatt, Steve McGowan 2014-04-15
7116670 Method and apparatus for extending point-to-point/asynchronous transfer mode services to client computer systems Tsung-Yuan C. Tai, David B. Andersen, Charles L. Brabenac 2006-10-03
7046674 Method and apparatus for extending point-to-point/asynchronous transfer mode services to client computer systems Tsung-Yuan C. Tai, David B. Andersen, Charles L. Brabenac 2006-05-16
6925083 Extending point-to-point/asynchronous transfer mode services to client computer systems Tsung-Yuan C. Tai, David B. Andersen, Charles L. Brabenac 2005-08-02
6795438 Method and apparatus for extending point-to-point/asynchronous transfer mode services to client computer systems Tsung-Yuan C. Tai, David B. Andersen, Charles L. Brabenac 2004-09-21
6584558 Article for providing event handling functionality in a processor supporting different instruction sets Gary N. Hammond, Donald B. Alpert, Harsh Sharangpani 2003-06-24
6408386 Method and apparatus for providing event handling functionality in a computer system Gary N. Hammond, Donald B. Alpert, Harsh Sharangpani 2002-06-18
6219774 Address translation with/bypassing intermediate segmentation translation to accommodate two different instruction set architecture Gary N. Hammond, Donald B. Alpert, Harsh Sharangpani 2001-04-17
5828903 System for performing DMA transfer with a pipeline control switching such that the first storage area contains location of a buffer for subsequent transfer Jay Sethuram, Haim Sadger, Farhad Mighani 1998-10-27
5802605 Physical address size selection and page size selection in an address translator Donald B. Alpert, Kenneth D. Shoemaker, Konrad K. Lai 1998-09-01
5774686 Method and apparatus for providing two system architectures in a processor Gary N. Hammond, Donald B. Alpert, Harsh Sharangpani 1998-06-30
5638525 Processor capable of executing programs that contain RISC and CISC instructions Gary N. Hammond, Donald B. Alpert 1997-06-10
5619502 Static and dynamic scheduling in an asynchronous transfer mode communication network David A. Eckhardt 1997-04-08
5617554 Physical address size selection and page size selection in an address translator Donald B. Alpert, Kenneth D. Shoemaker, Konrad K. Lai 1997-04-01
5283904 Multi-processor programmable interrupt controller system David G. Carson, Herman D. D'Hooge 1994-02-01
4315310 Input/output data processing system John A. Bayliss, George W. Cox, Bert E. Forbes 1982-02-09